Ren-Jie Lee

According to our database, Ren-Jie Lee authored at least 7 papers between 2007 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Board- and Chip-Aware Package Wire Planning.

Ren-Jie Lee, Hsin-Wu Hsu, Hung-Ming Chen

IEEE Trans. Very Large Scale Integr. Syst., 2013

A study of row-based area-array I/O design planning in concurrent chip-package design flow.

Ren-Jie Lee, Hung-Ming Chen

ACM Trans. Design Autom. Electr. Syst., 2013

2011

Efficient Package Pin-Out Planning With System Interconnects Optimization for Package-Board Codesign.

Ren-Jie Lee, Hung-Ming Chen

IEEE Trans. Very Large Scale Integr. Syst., 2011

On routing fixed escaped boundary pins for high speed boards.

Tsung-Ying Tsai, Ren-Jie Lee, Ching-Yu Chin, Chung-Yi Kuan, Hung-Ming Chen, Yoji Kajitani

Proceedings of the Design, Automation and Test in Europe, 2011

Row-based area-array I/O design planning in concurrent chip-package design flow.

Ren-Jie Lee, Hung-Ming Chen

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2009

Fast Flip-Chip Pin-Out Designation Respin for Package-Board Codesign.

Ren-Jie Lee, Hung-Ming Chen

IEEE Trans. Very Large Scale Integr. Syst., 2009

2007

Fast Flip-Chip Pin-Out Designation Respin by Pin-Block Design and Floorplanning for Package-Board Codesign.

Ren-Jie Lee, Ming-Fang Lai, Hung-Ming Chen

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007