Richard C. Jaeger

According to our database, Richard C. Jaeger authored at least 29 papers between 1983 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

First and Second Order Piezoresistive Characteristics of CMOS FETs: Weak through Strong Inversion.

Richard C. Jaeger, Jeffrey C. Suhling

Proceedings of the 48th European Solid-State Device Research Conference, 2018

2014

An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology.

Jianjun Yu, Feng Zhao, Joseph Cali, Fa Foster Dai, Desheng Ma, Xueyang Geng, Yuehai Jin, Yuan Yao, Xin Jin, J. David Irwin, Richard C. Jaeger

IEEE J. Solid State Circuits, 2014

Current dependence of the piezoresistive coefficients of CMOS FETs on (100) silicon.

Safina Hussain, Richard C. Jaeger, Jeffrey C. Suhling

Proceedings of the 44th European Solid State Device Research Conference, 2014

2011

An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse.

Desheng Ma, Fa Foster Dai, Richard C. Jaeger, J. David Irwin

IEEE J. Solid State Circuits, 2011

2010

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology.

Jianjun Yu, Fa Foster Dai, Richard C. Jaeger

IEEE J. Solid State Circuits, 2010

24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology.

Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger

IEEE J. Solid State Circuits, 2010

An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC.

Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger

IEEE J. Solid State Circuits, 2010

2009

Delta-Sigma Modulation for Direct Digital Frequency Synthesis.

Dayu Yang, Foster F. Dai, Weining Ni, Yin Shi, Richard C. Jaeger

IEEE Trans. Very Large Scale Integr. Syst., 2009

2008

A 12-Bit Cryogenic and Radiation-Tolerant Digital-to-Analog Converter for Aerospace Extreme Environment Applications.

Yuan Yao, Foster F. Dai, Richard C. Jaeger, John D. Cressler

IEEE Trans. Ind. Electron., 2008

A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology.

Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger

IEEE J. Solid State Circuits, 2008

An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC.

Xueyang Geng, Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger

Proceedings of the ESSCIRC 2008, 2008

An X/Ku-band frequency synthesizer using a 9-Bit quadrature DDS.

Xuefeng Yu, Fa Foster Dai, Dayu Yang, J. David Irwin, Richard C. Jaeger

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A fully integrated zero-IF mobile TV tuner RFIC for S-band CMMB application.

Yin Shi, Fa Foster Dai, Jun Yan, Hua Xu, Xuelian Zhang, Heping Ma, Fang Yuan, Xin Guan, Richard C. Jaeger

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A multifunction transceiver RFIC for 802.11a/b/g WLAN and DVB-H applications.

Yin Shi, Foster F. Dai, Jun Yan, Xueqing Hu, Hua Xu, Ming Gu, Xuelian Zhang, Qiming Xu, Bei Chen, Fangxiong Chen, Peng Yu, Heping Ma, Fang Yuan, Richard C. Jaeger

Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2006

A direct digital frequency synthesizer with fourth-order phase domain ΔΣ noise shaper and 12-bit current-steering DAC.

Fa Foster Dai, Weining Ni, Yin Shi, Richard C. Jaeger

IEEE J. Solid State Circuits, 2006

A 12-bit current steering DAC for cryogenic applications.

Yuan Yao, Xuefeng Yu, Foster F. Dai, Richard C. Jaeger

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver.

Oimins Xu, Xueqing Hu, Pens Gao, Jun Yan, Yin Shi, Foster F. Dai, Richard C. Jaeger

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks.

Vasanth Kakani, Foster F. Dai, Richard C. Jaeger

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Integrated blind electronic equalizer for fiber dispersion compensation.

Foster F. Dai, Shengfang Wei, Richard C. Jaeger

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

Delay analysis and optimal biasing for high speed low power Current Mode Logic circuits.

Vasanth Kakani, Foster F. Dai, Richard C. Jaeger

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantisation noise.

Malinky Ghosh, Lakshmi S. J. Chimakurthy, Foster F. Dai, Richard C. Jaeger

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2000

CMOS stress sensors on [100] silicon.

Richard C. Jaeger, Jeffrey C. Suhling, Ramanathan Ramani, Arthur T. Bradley, Jianping Xu

IEEE J. Solid State Circuits, 2000

1999

Neuro-fuzzy architecture for CMOS implementation.

Bogdan M. Wilamowski, Richard C. Jaeger, M. Okyay Kaynak

IEEE Trans. Ind. Electron., 1999

Test chips for die stress characterization using arrays of CMOS sensors.

Arthur T. Bradley, Richard C. Jaeger, Jeffrey C. Suhling, Y. Zou

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1996

Low-frequency noise in UHV/CVD epitaxial Si and SiGe bipolar transistors.

Lakshmi S. Vempati, John D. Cressler, Jeffrey Babcock, Richard C. Jaeger, David L. Harame

IEEE J. Solid State Circuits, 1996

CMOS implementation of a pulse-coupled neuron cell.

Bogdan M. Wilamowski, Richard C. Jaeger, Mary Lou Padgett, Lawrence J. Myers

Proceedings of International Conference on Neural Networks (ICNN'96), 1996

Implementation of RBF type networks by MLP networks.

Bogdan M. Wilamowski, Richard C. Jaeger

Proceedings of International Conference on Neural Networks (ICNN'96), 1996

1986

Computer-Aided Design of One-Dimensional MOSFET Impurity Profiles.

Richard C. Jaeger

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986

1983

An Efficient Numerical Algorithm for Simulation of MOS Capacitance.

Richard C. Jaeger, Fritz H. Gaensslen, Sherra E. Diehl

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983