Foster F. Dai

Orcid: 0000-0003-1691-6649

Affiliations:
  • Auburn University, USA


According to our database1, Foster F. Dai authored at least 93 papers between 2001 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Online presence:

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Bibliography

2024
A 10-bit 100kS/s SAR ADC With a Monotonic Capacitor Switching Procedure for Single-Ended Inputs in 22nm CMOS FDSOI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment.
IEEE J. Solid State Circuits, October, 2023

2022
A 0.97mW 260MS/s 12b Pipelined-SAR ADC with Ring-TDC-Based Fine Quantizer for PVT Robust Automatic Cross-Domain Scale Alignment.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
A Fractional-N Reference Sampling PLL With Linear Sampler and CDAC Based Fractional Spur Cancellation.
IEEE J. Solid State Circuits, 2021

2020
Sub-Sampling Direct RF-to-Digital Converter With 1024-APSK Modulation for High Throughput Polar Receiver.
IEEE J. Solid State Circuits, 2020

An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO.
IEEE J. Solid State Circuits, 2020

A 7.7~10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A 3.8 mW Sub-Sampling Direct RF-to-Digital Converter for Polar Receiver Achieving 1.94 Gb/s Data Rate with 1024-APSK Modulation.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

An 8-bit 80-MS/s Fully Self-Timed SAR ADC with 3/2 Interleaved Comparators and High-Order PVT Stabilized HBT Bandgap Reference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A 280MS/s 12b SAR-Assisted Hybrid ADC with Time Domain Sub-Range Quantizer in 45nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

An mm-Wave Synthesizer with Low In-Band Noise and Robust Locking Reference-Sampling PLL.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order ΔΣ Linearization.
IEEE J. Solid State Circuits, 2018

A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching.
IEEE J. Solid State Circuits, 2018

A Multi-Phase Coupled Oscillator Using Inductive Resonant Coupling and Modified Dual-Tank Techniques.
IEEE J. Solid State Circuits, 2018

A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 1.8 GHz-2.4 GHz SAW-Less Reconfigurable Receiver Frontend RFIC in 65nm CMOS RF SOI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A full-duplex transceiver front-end RFIC with code-domain spread spectrum modulation for Tx self-interference cancellation and in-band jammer rejection.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
An 802.11a/b/g/n Digital Fractional-N PLL With Automatic TDC Linearity Calibration for Spur Cancellation.
IEEE J. Solid State Circuits, 2017

Offset based feedforward amplifier with nonlinearity compensation and P1dB expansion.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A low phase noise 8.8 GHz VCO based on ISF manipulation and dual-tank technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

A 330μW 1.25ps 400fs-INL vernier time-to-digital converter with 2D reconfigurable spiral arbiter array and 2<sup>nd</sup>-order ΔΣ linearization.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A 0.8∼1.3 GHz multi-phase injection-locked PLL using capacitive coupled multi-ring oscillator with reference spur suppression.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

Session 24-Milimeter-wave communication circuits.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

A bidirectional lens-free digital-bits-in/-out 0.57mm<sup>2</sup> Terahertz nano-radio in CMOS with 49.3mW peak power consumption supporting 50cm Internet-of-Things communication.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
A 1∼1.5 GHz capacitive coupled inductor-less multi-ring oscillator with improved phase noise.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
Adaptive integratable hardware realization of analog neural networks for nonlinear system.
Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015

Session 4 - Frequency and phase generation techniques.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

Low noise coupling techniques for multi-phase oscillators.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology.
IEEE J. Solid State Circuits, 2014

A capacitive-coupling technique with phase noise and phase error reduction for multi-phase clock generation.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

Low power transceivers and oscillators.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
Introduction to the Special Section on the 26th Bipolar/BiCMOS Circuits and Technology Meeting.
IEEE J. Solid State Circuits, 2013

2012
Impact of Transceiver RFIC Impairments on MIMO System Performance.
IEEE Trans. Ind. Electron., 2012

A 0.6-V Quadrature VCO With Enhanced Swing and Optimized Capacitive Coupling for Phase Noise Reduction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Introduction to the Special Section on the 25th Bipolar/BiCMOS Circuits and Technology Meeting.
IEEE J. Solid State Circuits, 2012

Impact of process variations on computers used for image processing.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Remedies for noise degradation due to active Q-Enhancement Circuit.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 6<sup>th</sup> order zero capacitor spread 1MHz - 10MHz tunable CMOS active-RC low pass filter with fast tuning scheme.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Effect of CMOS device sizing on circuit noise performance.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

A harmonic rejection mixer in wideband transmitter.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

A 100MHz fifth-order low-pass gm-C filter using folded stages.
Proceedings of the 38th Annual Conference on IEEE Industrial Electronics Society, 2012

A single-chip x-band chirp radar MMIC with stretch processing.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

PLLs, VCOs, and dividers.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Selective Spectrum Analysis for Analog Measurements.
IEEE Trans. Ind. Electron., 2011

An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse.
IEEE J. Solid State Circuits, 2011

A 4.2-4.7GHz, 3.7mW digitally controlled oscillator RFIC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 3mW 8-Bit radiation-hardened-by-design DAC for ultra-wide temperature range from -180°C to 120°C.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 0.6V quadrature VCO with optimized capacitive coupling for phase noise reduction.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Effects of LO Phase and Amplitude Imbalances and Phase Noise on M -QAM Transceiver Performance.
IEEE Trans. Ind. Electron., 2010

A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology.
IEEE J. Solid State Circuits, 2010

24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2010

An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC.
IEEE J. Solid State Circuits, 2010

An X-Band Transformer-Coupled Varactor-Less Quadrature Current-Controlled Oscillator in 0.18 μm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2010

A 3-dimensional Vernier ring time-to-digital converter in 0.13µm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

A CMOS programmable gain amplifier with a novel DC-offset cancellation technique.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

On-chip Jitter Measurement Using Vernier Ring Time-to-Digital Converter.
Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009
Delta-Sigma Modulation for Direct Digital Frequency Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2009

A Fully Integrated 900-MHz Passive RFID Transponder Front End With Novel Zero-Threshold RF-DC Rectifier.
IEEE Trans. Ind. Electron., 2009

Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

A 430MHz-2.15GHz fractional-N frequency synthesizer for DVB and ABS-S applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A 12-Bit Cryogenic and Radiation-Tolerant Digital-to-Analog Converter for Aerospace Extreme Environment Applications.
IEEE Trans. Ind. Electron., 2008

A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits, 2008

Design and Analysis of a Transversal Filter RFIC in SiGe Technology.
IEEE Des. Test Comput., 2008

An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC.
Proceedings of the ESSCIRC 2008, 2008

An X/Ku-band frequency synthesizer using a 9-Bit quadrature DDS.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A fully integrated zero-IF mobile TV tuner RFIC for S-band CMMB application.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A multifunction transceiver RFIC for 802.11a/b/g WLAN and DVB-H applications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Session 9 - Broadband circuit techniques for emerging wireless communications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

Session 5 - Broadband circuit techniques for emerging wireless communications.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
FPGA-Based Analog Functional Measurements for Adaptive Control in Mixed-Signal Systems.
IEEE Trans. Ind. Electron., 2007

A 10-bit 2GHz Current-Steering CMOS D/A Converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Noise Figure Measurement Using Mixed-Signal BIST.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Automatic linearity and frequency response tests with built-in pattern generator and analyzer.
IEEE Trans. Very Large Scale Integr. Syst., 2006

A direct digital frequency synthesizer with fourth-order phase domain ΔΣ noise shaper and 12-bit current-steering DAC.
IEEE J. Solid State Circuits, 2006

Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance.
EURASIP J. Wirel. Commun. Netw., 2006

A 12-bit current steering DAC for cryogenic applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Analog frequency response measurement in mixed-signal systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A 12-bit 300 MHz CMOS DAC for high-speed system applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A multiband ΔΣ fractional-N frequency synthesizer for a MIMO WLAN transceiver RFIC.
IEEE J. Solid State Circuits, 2005

A fully integrated multiband MIMO WLAN transceiver RFIC.
IEEE J. Solid State Circuits, 2005

2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A novel low-power input-independent MOS AC/DC charge pump.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Built-in self-test for automatic analog frequency response measurement.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Integrated blind electronic equalizer for fiber dispersion compensation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Automatic Linearity (IP3) Test with Built-in Pattern Generator and Analyzer.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Delay analysis and optimal biasing for high speed low power Current Mode Logic circuits.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantisation noise.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications.
Proceedings of the ESSCIRC 2003, 2003

2001
Enabling multimedia applications for factory automation.
IEEE Trans. Ind. Electron., 2001


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