Richard Crisp

According to our database, Richard Crisp authored at least 7 papers between 1996 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 4.8GB/s 256Mb(x16) Reduced-Pin-Count DRAM and Controller Architecture (RPCA) to Reduce Form-Factor & Cost for IOT/Wearable/TCON/Video/AI-Edge Systems.

Chun Shiah, C. N. Chang, Richard Crisp, C. P. Lin, C. N. Pan, C. P. Chuang, H. L. Chen, S. H. Jheng, T. F. Chang, W. J. Huang, K. C. Ting, Rick Dai, W. M. Huang, Bor-Doou Rong, Nicky Lu

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2017

Residual Bulk Image Characterization using Photon Transfer Techniques.

Richard Crisp

Proceedings of the Image Sensors and Imaging Systems 2017, 2017

2012

Cost-minimized double die DRAM packaging for ultra-high performance DDR3 and DDR4 multi-rank server DIMMs.

Richard Crisp, Bill Gervasi, Wael Zohni, Bel Haba

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011

Residual bulk image quantification and management for a full frame charge coupled device image sensor.

Richard Crisp

J. Electronic Imaging, 2011

1998

A 2.6-GByte/s multipurpose chip-to-chip interface.

Benedict Lau, Yiu-Fai Chan, Alfredo Moncayo, John T. C. Ho, Mike Allen, Joe Salmon, Jonathan Liu, Manish Muthal, Cliff Lee, Tim Nguyen, Bryce Horine, Mike Leddige, Kuojim Huang, Jason Wei, Leung Yu, Richard Tarver, Yuwen Hsia, Roxanne Vu, Ely Tsern, Haw-Jyh Liaw, Jim Hudson, David Nguyen, Kevin S. Donnelly, Richard Crisp

IEEE J. Solid State Circuits, 1998

1997

Direct RAMbus technology: the new main memory standard.

Richard Crisp

IEEE Micro, 1997

1996

High Bandwidth RDRAM Technology Reduces System Cost.

Richard Crisp

Proceedings of the Forty-First IEEE Computer Society International Conference: Technologies for the Information Superhighway, 1996