Nicky Lu
According to our database1,
Nicky Lu
authored at least 8 papers
between 2007 and 2021.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 1991, "For contributions to semiconductor memory design and technology.".
Timeline
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On csauthors.net:
Bibliography
2021
Enhanced Core Circuits for scaling DRAM: 0.7V VCC with Long Retention 138ms at 125°C and Random Row/Column Access Times Accelerated by 1.5ns.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Optimizing Monolithic and Heterogeneous Integration to Create Intelligent-Grand-Scale-Integration for Smart MicroSystems.
Proceedings of the Device Research Conference, 2021
2019
A 4.8GB/s 256Mb(x16) Reduced-Pin-Count DRAM and Controller Architecture (RPCA) to Reduce Form-Factor & Cost for IOT/Wearable/TCON/Video/AI-Edge Systems.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
2015
A computer designed half Gb 16-channel 819Gb/s high-bandwidth and 10ns low-latency DRAM for 3D stacked memory devices using TSVs.
Proceedings of the Symposium on VLSI Circuits, 2015
2011
Future system and memory architectures: Transformations by technology and applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
2008
Introduction to the Special Section on the 2007 Asian Solid-State Circuits Conference (A-SSCC'07).
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007