Robert D'Angelo

Orcid: 0000-0003-2542-059X

According to our database1, Robert D'Angelo authored at least 10 papers between 2013 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2018
Process Scalability of Pulse-Based Circuits for Analog Image Convolution.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Computationally Efficient Visual Saliency Algorithm Suitable for an Analog CMOS Implementation.
Neural Comput., 2018

An Analog Visual Saliency Processor using Time-mode Computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2016
Precise time mode multiplier using digital primitives and passive components.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Three dimensional graphene scaffold for cardiac tissue engineering and in-situ electrical recording.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

2015
A Time-Mode Translinear Principle for Nonlinear Analog Computation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
A time-mode translinear principle for implementing analog multiplication.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
A Compressed Sensing Analog-to-Information Converter With Edge-Triggered SAR ADC Core.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Experimental results on wideband spectrum sensing using random sampling ADC in 90nm CMOS.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Compressed sensing of EEG using a random sampling ADC in 90nm CMOS.
Proceedings of the 2013 IEEE International Conference on Body Sensor Networks, 2013


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