Robert Vachon

According to our database, Robert Vachon authored at least 3 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

An Adaptive Clock Duty-Cycle Controller to Mitigate Aging-Induced Clock Duty-Cycle Distortion in Automotive and IoT Processors.

Daniel Yingling, Yimai Peng, Robert Vachon, Dipti Pal, Sagar Jariwala, Felipe G. Cabral, Shih-Hsin Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith A. Bowman

IEEE J. Solid State Circuits, February, 2026

A 2nm Clock-Edge Architecture for Processor Clock-Power Reduction.

Yimai Peng, Daniel Yingling, Basma Hajri, Robert Vachon, Fikre Tsigabu Gebreyohannes, Vincent Li, Ghanshyam Chhetri, Keith A. Bowman

Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2024

14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle Distortion.

Daniel Yingling, Yimai Peng, Robert Vachon, Dipti Pal, Sagar Jariwala, Felipe G. Cabral, Jason Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith A. Bowman

Proceedings of the IEEE International Solid-State Circuits Conference, 2024