Roberto Bosio

According to our database, Roberto Bosio authored at least 4 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2025

SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-specific LLVM Passes for Compute-Intensive FPGA Accelerators.

Giovanni Brignone, Roberto Bosio, Fabrizio Ottati, Claudio Sansoè, Luciano Lavagno

ACM Trans. Reconfigurable Technol. Syst., June, 2025

NN2FPGA: Optimizing CNN Inference on FPGAs With Binary Integer Programming.

Roberto Bosio, Filippo Minnella, Teodoro Urso, Mario R. Casu, Luciano Lavagno, Mihai T. Lazarescu, Paolo Pasini

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2025

Low-Power Subgraph Isomorphism at the Edge Using FPGAs.

Roberto Bosio, Giovanni Brignone, Teodoro Urso, Mihai T. Lazarescu, Luciano Lavagno, Paolo Pasini

IEEE Access, 2025

2024

LESS: Low-Power Energy-Efficient Subgraph Isomorphism on FPGA.

Roberto Bosio, Giovanni Brignone, Filippo Minnella, M. Usman Jamal, Luciano Lavagno

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024