Paolo Pasini

Orcid: 0000-0001-6233-0994

According to our database1, Paolo Pasini authored at least 17 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Interpolation with guided refinement: revisiting incrementality in SAT-based unbounded model checking.
Formal Methods Syst. Des., April, 2022

2021
Optimizing Binary Decision Diagrams for Interpretable Machine Learning Classification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Reducing Interpolant Circuit Size Through SAT-Based Weakening.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2019
Logic Synthesis for Interpolant Circuit Compaction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
Test of Reconfigurable Modules in Scan Networks.
IEEE Trans. Computers, 2018

To split or to group: from divide-and-conquer to sub-task sharing for verifying multiple properties in model checking.
Int. J. Softw. Tools Technol. Transf., 2018

2017
Improving bit-level model checking algorithms for scalability through circuit-based reasoning.
PhD thesis, 2017

SAT solver management strategies in IC3: an experimental approach.
Formal Methods Syst. Des., 2017

Interpolation-Based Learning as a Mean to Speed-Up Bounded Model Checking (Short Paper).
Proceedings of the Software Engineering and Formal Methods - 15th International Conference, 2017

2016
A Greedy Approach to Answer Reachability Queries on DAGs.
CoRR, 2016

Reducing interpolant circuit size by ad-hoc logic synthesis and SAT-based weakening.
Proceedings of the 2016 Formal Methods in Computer-Aided Design, 2016

A 7/2-Approximation Algorithm for the Maximum Duo-Preservation String Mapping Problem.
Proceedings of the 27th Annual Symposium on Combinatorial Pattern Matching, 2016

Test Time Minimization in Reconfigurable Scan Networks.
Proceedings of the 25th IEEE Asian Test Symposium, 2016

2014
Hardware Model Checking Competition 2014: An Analysis and Comparison of Solvers and Benchmarks.
J. Satisf. Boolean Model. Comput., 2014

Interpolation with Guided Refinement: Revisiting incrementality in SAT-based unbounded model checking.
Proceedings of the Formal Methods in Computer-Aided Design, 2014

Tightening BDD-based approximate reachability with SAT-based clause generalization<sup>∗</sup>.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Fast cone-of-influence computation and estimation in problems with multiple properties.
Proceedings of the Design, Automation and Test in Europe, 2013


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