Ruei-Ting Wang

According to our database, Ruei-Ting Wang authored at least 3 papers between 2020 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection.

Poki Chen, Joshua Adiel Wijaya, Seiji Kajihara, Trio Adiono, Hsiang-Yu Chen, Ruei-Ting Wang, Yousuke Miyake

IEEE Access, 2022

2020

High-Precision PLL Delay Matrix With Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters.

Poki Chen, Jian-Ting Lan, Ruei-Ting Wang, Nguyen My Qui, John Carl Joel S. Marquez, Seiji Kajihara, Yousuke Miyake

IEEE Trans. Very Large Scale Integr. Syst., 2020

Low Flicker Dimmable Multichannel LED Driver With Matrix-Style DPWM and Precise Current Matching.

Poki Chen, Yung-Hsuan Chen, John Carl Joel S. Marquez, Ruei-Ting Wang, Jiann-Jong Chen, Yuh-Shyan Hwang

IEEE Trans. Very Large Scale Integr. Syst., 2020