Rui Wang

Affiliations:
  • Southern Methodist University, Dallas, TX, USA (PhD 2014)


According to our database1, Rui Wang authored at least 9 papers between 2012 and 2017.

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Bibliography

2017
A Temperature Compensated Triple-Path PLL With K<sub>VCO</sub> Non-Linearity Desensitization Capable of Operating at 77 K.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016
A 1-16 Gb/s All-Digital Clock and Data Recovery With a Wideband High-Linearity Phase Interpolator.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2015
Effect of OPAMP Input Offset on Continuous-Time ΔΣ Modulators With Current-Mode DACs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A 180-V<sub>pp</sub> Integrated Linear Amplifier for Ultrasonic Imaging Applications in a High-Voltage CMOS SOI Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A 150 MHz bandwidth continuous-time ΔΣ modulator in 28 nm CMOS with DAC calibration.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A 21-Gb/s, 0.96-pJ/bit serial receiver with non-50% duty-cycle clocking 1-tap decision feedback equalizer in 65nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2012
A 30mW 10b 250MS/s dual channel SHA-less pipeline ADC in 0.18µm CMOS.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A 12b 60MS/s SHA-less opamp-sharing pipeline A/D with switch-embedded dual input OTAs.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A power-optimized reconfigurable CT ΔΣ modulator in 65nm CMOS.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012


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