Ruicheng Pan

According to our database, Ruicheng Pan authored at least 3 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A row- and column-individually programmable logic-in-memory macro using memristor-based non-volatile SRAM.

Shuang Liu, Junjie Wang, Yihe Liu, Siyu Xiao, Y. T. Chen, Hao Hu, Shiqin Yan, Ruicheng Pan, Yang Wang, Z. Y. Hu, Qi Yu, Tupei Chen, Yang Liu

Microelectron. J., 2026

2024

Design and implementation of a charge-sharing in-memory-computing macro with sparse feature for quantized neural network.

Yihe Liu, Junjie Wang, Shuang Liu, Mingyuan Sun, Xiaoyang Zhang, Jingtao Zhou, Shiqin Yan, Ruicheng Pan, Hao Hu, Yang Liu

Microelectron. J., 2024

Live Demonstration for Input-Sparsity-Aware RRAM Processing-in-Memory Chip.

Junjie Wang, Shuang Liu, Ruicheng Pan, Shiqin Yan, Yihe Liu, Yang Liu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024