Ryoichi Yamaguchi

According to our database, Ryoichi Yamaguchi authored at least 7 papers between 1996 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2011

A tool set for the design of asynchronous circuits with bundled-data implementation.

Minoru Iizuka, Naohiro Hamada, Hiroshi Saito, Ryoichi Yamaguchi, Minoru Yoshinaga

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2008

An Embedded Reconfigurable IP Core with Variable Grain Logic Cell Architecture.

Motoki Amagasaki, Ryoichi Yamaguchi, Masahiro Koga, Masahiro Iida, Toshinori Sueyoshi

Int. J. Reconfigurable Comput., 2008

2007

An Embedded Reconfigurable Logic Core based on Variable Grain Logic Cell Architecture.

Yoshiaki Satou, Motoki Amagasaki, Hiroshi Miura, Kazunori Matsuyama, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

A Variable Grain Logic Cell Architecture for Reconfigurable Logic Cores.

Motoki Amagasaki, Ryoichi Yamaguchi, Kazunori Matsuyama, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the FPL 2007, 2007

Evaluating Variable-Grain Logic Cells Using Heterogeneous Technology Mapping.

Kazunori Matsuyama, Motoki Amagasaki, Hideaki Nakayama, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the Reconfigurable Computing: Architectures, 2007

2006

Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device.

Motoki Amagasaki, Takurou Shimokawa, Kazunori Matsuyama, Ryoichi Yamaguchi, Hideaki Nakayama, Naoto Hamabe, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the IFIP VLSI-SoC 2006, 2006

1996

Real-time Emulation Method for ATM Switching Systems in Broadband ISDN.

Tsuneo Matsumura, Naoaki Yamanaka, Ryoichi Yamaguchi, Keiji Ishikawa

Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996