Kazunori Matsuyama

According to our database, Kazunori Matsuyama authored at least 4 papers between 2006 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

An Embedded Reconfigurable Logic Core based on Variable Grain Logic Cell Architecture.

Yoshiaki Satou, Motoki Amagasaki, Hiroshi Miura, Kazunori Matsuyama, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

A Variable Grain Logic Cell Architecture for Reconfigurable Logic Cores.

Motoki Amagasaki, Ryoichi Yamaguchi, Kazunori Matsuyama, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the FPL 2007, 2007

Evaluating Variable-Grain Logic Cells Using Heterogeneous Technology Mapping.

Kazunori Matsuyama, Motoki Amagasaki, Hideaki Nakayama, Ryoichi Yamaguchi, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the Reconfigurable Computing: Architectures, 2007

2006

Evaluation of Variable Grain Logic Cell Architecture for Reconfigurable Device.

Motoki Amagasaki, Takurou Shimokawa, Kazunori Matsuyama, Ryoichi Yamaguchi, Hideaki Nakayama, Naoto Hamabe, Masahiro Iida, Toshinori Sueyoshi

Proceedings of the IFIP VLSI-SoC 2006, 2006