Sakari Lahti

Orcid: 0000-0002-9915-4784

According to our database1, Sakari Lahti authored at least 6 papers between 2012 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Leveraging Modern C++ in High-Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

2022
High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications.
ACM Trans. Design Autom. Electr. Syst., 2022

2020
Implementation of a Nonlinear Self-Interference Canceller using High-Level Synthesis.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Are We There Yet? A Study on the State of High-Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2016
Designing a clock cycle accurate application with high-level synthesis.
Proceedings of the IECON 2016, 2016

2012
Integration of TTA processor tools to Kactus2 IP-XACT design flow.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012


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