Sameh A. Ibrahim

Orcid: 0000-0001-8049-1441

According to our database1, Sameh A. Ibrahim authored at least 45 papers between 2010 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Fast Parallel Multiple Access Distributed Arithmetic (FPMA-DA) Reconfigurable FIR Filter.
Proceedings of the International Conference on Microelectronics, 2023

2022
A Scalable 20V Charge-Pump-Based Driver in 65nm CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Triple-Mode Programmable 12V Charge Pump for High Dynamic Range Photodiode Array Biasing.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Analysis, Modeling, and optimization of Single-Inductor Multiple-Output Continuous Conduction Mode Buck Converter with Arbitrary Number of Outputs.
Proceedings of the International Conference on Microelectronics, 2022

Reinforcement-Learning Based Method for Accelerating Functional Coverage Closure of Traffic Light Controller Dynamic Digital Design.
Proceedings of the 32nd International Conference on Computer Theory and Applications, 2022

2021
A 20-Gb/s charge-steering equalizer utilizing highly-efficient charge-steering linear equalizer.
Microelectron. J., 2021

91.6% efficient hybrid DC-DC buck converter with wide programmable conversion range.
Microelectron. J., 2021

Novel Decimation Topology with Improved Jitter Performance for Clock and Data Recovery Systems.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

A Low Power High PSR Wide Load LDO With Load-Dependent Feedforward Cancellation Technique.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Low Power, Dual Mode Bluetooth 5.1/Bluetooth Low Energy Receiver Design.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Cancelable face and fingerprint recognition based on the 3D jigsaw transform and optical encryption.
Multim. Tools Appl., 2020

A reference frequency quadrupler for high performance frequency synthesizers.
Microelectron. J., 2020

A 112-fJ/bit 10-Gb/s Charge-Steering Equalizer Utilizing a Discrete-Time Linear Equalizer.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Charge-Steering Based Divider for Low-Power PLL Applications.
Proceedings of the 15th Design & Technology of Integrated Systems in Nanoscale Era, 2020

2019
Design Optimization for Low-Power Reconfigurable Switched-Capacitor DC-DC Voltage Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 34-fJ/bit 20-Gb/s 1/8-rate Charge-Steering DFE for IoT Applications.
Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

A 1.52-GHz Super-Harmonic Injection-Locked Ring Oscillator in 130nm CMOS.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018
Power-Gating Sub-Threshold Source-Coupled Logic (PG-STSCL) circuits for ultra-low-power applications.
Microelectron. J., 2018

A 1.65 to 2.5 GHz Wide-band RF Energy Harvester.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Design of Configurable CMOS Capacitive Fingerprint.
Proceedings of the 30th International Conference on Microelectronics, 2018

Design and Investigation of Configurable Source Coupled Logic.
Proceedings of the 30th International Conference on Microelectronics, 2018

Resource Aware Space Mission Routing.
Proceedings of the 2018 International Conference on Computer and Applications (ICCA), 2018

2017
A Sizing Methodology for Rise-Time Minimization of Dickson Charge Pumps With Capacitive Loads.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Design and Simulation of Fuzzy Water Monitoring System Using WSN for Fishing.
Proceedings of the International Conference on Advanced Intelligent Systems and Informatics 2017, 2017

2016
A 24-mW 65-nm CMOS TI-Flash ADC for multi-standard serial-link receivers.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

A fast-locking all-digital clock and data recovery circuit using successive approximation.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

A novel current steering charge pump with low current mismatch and variation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Stability analysis and design methodology of near-threshold 6T SRAM cells.
Proceedings of the 28th International Conference on Microelectronics, 2016

Design and analysis of a low-power high-speed charge-steering based StrongARM comparator.
Proceedings of the 28th International Conference on Microelectronics, 2016

12-Gb/s low-power voltage-mode driver for multi-standard serial-link applications.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A 1-mW 12-GHz LC VCO in 65-nm CMOS technology.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
A low-power, 9-Bit, 1.2 ps resolution two-step time-to-digital converter in 65 nm CMOS.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015

An 8Gbps discrete time linear equalizer in 40nm CMOS technology.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A 15.5-mW 20-GSps 4-bit charge-steering flash ADC.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A low-temperature-coefficient curvature-compensated bandgap reference with mismatch attenuation.
Proceedings of the 10th International Design & Test Symposium, 2015

A 10 Gbps ADC-based equalizer for serial I/O receiver.
Proceedings of the 10th International Design & Test Symposium, 2015

6-Gb/s serial link transceiver for NoCs.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A 1.6-nA quiescent current bandgap reference in 130-nm CMOS technology.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A wideband 5 GHz digital PLL using a low-power two-step time-to-digital converter.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Design of a 10Gsps TI-flash ADC with modified clocking scheme.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A low-power high-speed charge-steering ADC-based equalizer for serial links.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014
A 8 Gbps 0.67mW 1 tap current integrating DFE in 40nm CMOS.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2011
Low-Power CMOS Equalizer Design for 20-Gb/s Systems.
IEEE J. Solid State Circuits, 2011

Maximising return on investment (ROI) for pharmaceutical production.
Int. J. Manuf. Technol. Manag., 2011

2010
A 20Gb/s 40mW equalizer in 90nm CMOS technology.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010


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