Samir Roy

According to our database1, Samir Roy authored at least 26 papers between 1993 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
ECKM: An improved K-means clustering based on computational geometry.
Expert Syst. Appl., February, 2023

2019
Automatic short answer grading using rough concept clusters.
Int. J. Adv. Intell. Paradigms, 2019

2018
A neural network-based intelligent cognitive state recognizer for confidence-based e-learning system.
Neural Comput. Appl., 2018

An effective e-learning system through learners' scaffolding.
Int. J. Adv. Intell. Paradigms, 2018

2017
A Fuzzy Indiscernibility Based Measure of Distance between Semantic Spaces Towards Automatic Evaluation of Free Text Answers.
Int. J. Uncertain. Fuzziness Knowl. Based Syst., 2017

2016
Intelligent fuzzy spelling evaluator for e-Learning systems.
Educ. Inf. Technol., 2016

2014
Semantic Similarity Based Approach for Automatic Evaluation of Free Text Answers Using Link Grammar.
Proceedings of the Sixth IEEE International Conference on Technology for Education, 2014

2013
Online Recommendation of Learning Path for an E-Learner under Virtual University.
Proceedings of the Distributed Computing and Internet Technology, 2013

2011
Fuzzy Automata Inspired Intelligent Assesment of Learning Achievement.
Proceedings of the 5th Indian International Conference on Artificial Intelligence, 2011

2006
Understanding the porosity dependence of heat flux through glass fiber insulation.
Math. Comput. Model., 2006

Minority Gate Oriented Logic Design with Quantum-Dot Cellular Automata.
Proceedings of the Cellular Automata, 2006

2005
A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area.
J. Electron. Test., 2005

Cellular Automata Based Test Structures with Logic Folding.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Synthesis of Testable Finite State Machine Through Decomposition.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004
Cellular Automata Based Encompression Technology for Voice Data.
Proceedings of the Cellular Automata, 2004

2003
BHB: A Simple Knowledge-Based Scoring Function to Improve the Efficiency of Database Screening.
J. Chem. Inf. Comput. Sci., 2003

Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

Evolutionary Approach to Solve the Complex-Triangle Elimination (CTE) Problem of VLSI Floor-planning.
Proceedings of the 1st Indian International Conference on Artificial Intelligence, 2003

Power Conscious BIST Design for Sequential Circuits Using ghost-FSM.
Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

Efficient BIST design for sequential machines using FiF-FoF values in machine states.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

2001
Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis.
Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001

1997
KGPMIN: an efficient multilevel multioutput AND-OR-XOR minimizer.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1996
Synthesis of Highly Testable Fixed-Polarity AND-XOR Canonical Networks-A Genetic Algorithm-Based Approach.
IEEE Trans. Computers, 1996

1995
Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture.
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1993
Delay Fault Test Generation with Cellular Automata.
Proceedings of the Sixth International Conference on VLSI Design, 1993


  Loading...