Sanjiv Narayan

According to our database1, Sanjiv Narayan authored at least 23 papers between 1991 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2014
Energy optimization in Android applications through wakelock placement.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2003
Graph Transformations for Improved Tree Height Reduction.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

1998
SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design.
IEEE Trans. Very Large Scale Integr. Syst., 1998

System-level exploration with SpecSyn.
Proceedings of the 35th Conference on Design Automation, 1998

1996
System design methodologies: aiming at the 100 h design cycle.
IEEE Trans. Very Large Scale Integr. Syst., 1996

An optimal clock period selection method based on slack minimization criteria.
ACM Trans. Design Autom. Electr. Syst., 1996

Rapid performance estimation for system design.
Proceedings of the conference on European design automation, 1996

1995
SpecCharts: a VHDL front-end for embedded systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Software estimation using a generic-processor model.
Proceedings of the 1995 European Design and Test Conference, 1995

Interfacing Incompatible Protocols Using Interface Process Generation.
Proceedings of the 32st Conference on Design Automation, 1995

1994
A transformation for integrating VHDL behavioral specification with synthesis and software generation.
Proceedings of the Proceedings EURO-DAC'94, 1994

100-hour design cycle: a test case.
Proceedings of the Proceedings EURO-DAC'94, 1994

Synthesis of System-Level Bus Interfaces.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

A System-Design Methodology: Executable-Specification Refinement.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Protocol Generation for Communication Channels.
Proceedings of the 31st Conference on Design Automation, 1994

1993
Synthesis of functions and procedures in behavioral VHDL.
Proceedings of the European Design Automation Conference 1993, 1993

Features supporting system-level specification in HDLs.
Proceedings of the European Design Automation Conference 1993, 1993

1992
System Specification with the SpecCharts Language.
IEEE Des. Test Comput., 1992

System Level Specification and Synthesis.
Proceedings of the Fifth International Conference on VLSI Design, 1992

Semantics and synthesis of signals in behavioral VHDL.
Proceedings of the conference on European design automation, 1992

System clock estimation based on clock slack minimization.
Proceedings of the conference on European design automation, 1992

1991
System Specification and Synthesis with the SpecCharts Language.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Translating system specifications to VHDL.
Proceedings of the conference on European design automation, 1991


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