Satish Sivaswamy

According to our database, Satish Sivaswamy authored at least 7 papers between 2005 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

Performance driven routing for modern FPGAs.

PariVallal Kannan, Satish Sivaswamy

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2009

Estimation and optimization of reliability of noisy digital circuits.

Satish Sivaswamy, Kia Bazargan, Marc D. Riedel

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2008

Statistical Analysis and Process Variation-Aware Routing and Skew Assignment for FPGAs.

Satish Sivaswamy, Kia Bazargan

ACM Trans. Reconfigurable Technol. Syst., 2008

2007

Statistical Generic And Chip-Specific Skew Assignment for Improving Timing Yield of FPGAs.

Satish Sivaswamy, Kia Bazargan

Proceedings of the FPL 2007, 2007

Variation-aware routing for FPGAs.

Satish Sivaswamy, Kia Bazargan

Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

2006

Statistical Analysis and Design of HARP FPGAs.

Gang Wang, Satish Sivaswamy, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Elaheh Bozorgzadeh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

HARP: hard-wired routing pattern FPGAs.

Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh

Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005