Satoshi Uemori

According to our database, Satoshi Uemori authored at least 9 papers between 2010 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Highly-Efficient Sidelink SSB Format and Synchronization Algorithm for Common-Mode Signaling in 5G NR Sidelink-Based mmWave WPAN Systems.

Satoshi Uemori, Ryogo Okura, Yusuke Koda, Hiroshi Harada

Proceedings of the 2025 IEEE Wireless Communications and Networking Conference (WCNC), 2025

2013

Multi-bit Sigma-Delta TDC Architecture with Improved Linearity.

Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai

J. Electron. Test., 2013

2012

Multi-bit sigma-delta TDC architecture with self-calibration.

Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuta Arakawa, Daiki Hirabayashi, Yuji Yano, Tatsuhiro Gake, Nobukazu Takai, Takahiro J. Yamaguchi

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2011

Background Self-Calibration Algorithm for Pipelined ADC Using Split ADC Scheme.

Takuya Yagi, Kunihiko Usui, Tatsuji Matsuura, Satoshi Uemori, Satoshi Ito, Yohei Tan, Haruo Kobayashi

IEICE Trans. Electron., 2011

Design for Testability That Reduces Linearity Testing Time of SAR ADCs.

Tomohiko Ogawa, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Satoshi Ito, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu

IEICE Trans. Electron., 2011

2010

Background calibration algorithm for pipelined ADC with open-loop residue amplifier using split ADC structure.

Takuya Yagi, Kunihiko Usui, Tatsuji Matsuura, Satoshi Uemori, Yohei Tan, Satoshi Ito, Haruo Kobayashi

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

ADC linearity test signal generation algorithm.

Satoshi Uemori, Takahiro J. Yamaguchi, Satoshi Ito, Yohei Tan, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Nobuyoshi Ishikawa

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

SAR ADC that is configurable to optimize yield.

Tomohiko Ogawa, Haruo Kobayashi, Yohei Tan, Satoshi Ito, Satoshi Uemori, Nobukazu Takai, Kiichi Niitsu, Takahiro J. Yamaguchi, Tatsuji Matsuura, Nobuyoshi Ishikawa

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Stochastic TDC architecture with self-calibration.

Satoshi Ito, Shigeyuki Nishimura, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010