Satyajit Mohapatra

According to our database, Satyajit Mohapatra authored at least 13 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Re-Max: A Reward Maximization Approach for Heterogeneous Drone Scheduling Problem.

Satyajit Mohapatra, Sanjeet Kumar Nayak

Proceedings of the 25th International Conference on Distributed Computing and Networking, 2024

Greedy Algorithms for Heterogeneous Drone Delivery Packing in the Cloud-assisted Intelligent Transportation System.

Satyajit Mohapatra, Sanjeet Kumar Nayak

Proceedings of the 16th International Conference on COMmunication Systems & NETworkS, 2024

2022

An Ensemble Approach for Annotating Source Code Identifiers With Part-of-Speech Tags.

Christian D. Newman, Michael John Decker, Reem S. Alsuhaibani, Anthony Peruma, Mohamed Wiem Mkaouer, Satyajit Mohapatra, Tejal Vishnoi, Marcos Zampieri, Timothy J. Sheldon, Emily Hill

IEEE Trans. Software Eng., 2022

Dispersion in Placement: Quantification and Insights.

Satyajit Mohapatra, Nihar Ranjan Mohapatra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2020

Gradient Error Compensation in SC-MDACs.

Satyajit Mohapatra, Nihar Ranjan Mohapatra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

The Design of Ultra Low Power SAR ADC for Implantable Cardioverter Defibrillator (ICD).

Satyajit Mohapatra, Nihar Ranjan Mohapatra

Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

2019

A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC.

Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra, Sanjeev Mehta, Arup Roy Chowdhury, Nisha Pandya

Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Design and Calibration of 14-bit 10 KS/s Low Power SAR ADC for Bio-medical Applications.

Yadukrishnan Mekkattillam, Satyajit Mohapatra, Nihar R. Mohapatra

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

2018

The HotSpot Compensation in High Speed Data Converters.

Satyajit Mohapatra, Nihar Ranjan Mohapatra

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Mismatch Resilient 3.5-Bit MDAC with MCS-CFCS.

Satyajit Mohapatra, Hari Shanker Gupta, Nihar Ranjan Mohapatra

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017

A 64b/66b Line Encoding for High Speed Serializers.

Satyajit Mohapatra, Hari Shanker Gupta, Jatindeep Singh, Nihar Ranjan Mohapatra

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Performance Optimized 64b/66b Line Encoding Technique for High Speed SERDES Devices.

Jatindeep Singh, Satyajit Mohapatra, Nihar Ranjan Mohapatra

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2016

Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array.

Hari Shanker Gupta, Satyajit Mohapatra, Nihar R. Mohapatra, Dinesh Kumar Sharma

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016