Dinesh Kumar Sharma

According to our database1, Dinesh Kumar Sharma authored at least 49 papers between 2006 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Improving Cost for Data Migration in Cloud Computing Using Genetic Algorithm.
Int. J. Softw. Innov., 2020

2019
Design and Implementation of a Wireless SensorNetwork for Agricultural Applications.
CoRR, 2019

Large Dynamic Range Readout Integrated Circuit for Infrared Detectors.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

2018
Bio-WiTel: A Low-Power Integrated Wireless Telemetry System for Healthcare Applications in 401-406 MHz Band of MedRadio Spectrum.
IEEE J. Biomed. Health Informatics, 2018

Measurements of the effect of jitter on the performance of clock retiming circuits for on-chip interconnects.
Microelectron. J., 2018

A pulse oximeter system, <i>OxiSense</i>, with embedded signal processing using an ultra-low power ASIC designed for testability.
Microelectron. J., 2018

Low Power Configurable Readout Integrated Circuit for Infrared Detector.
Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017
Sense amplifier comparator with offset correction for decision feedback equalization based receivers.
Microelectron. J., 2017

Clock Skew Measurement Using an All-Digital Sigma-Delta Time to Digital Converter.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

A Clock Retiming Circuit for Repeaterless Low Swing On-Chip Interconnects.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Settling time of mesochronous clock re-timing circuits in the presence of timing jitter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Low power, area efficient, and temperature-variation tolerant bidirectional current source for sensor applications.
Microelectron. J., 2016

Settling Time of Mesochronous Clock Retiming Circuits for Low Swing Interconnects.
CoRR, 2016

SAW resonator oscillator based injection locked OOK transmitter for MedRadio spectrum.
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Novel design of a silicon photodetector and its integration in a 4×4 CMOS pixel array.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Testable design of repeaterless low swing on-chip interconnect.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
A Fully On-Chip PT-Invariant Transconductor.
IEEE Trans. Very Large Scale Integr. Syst., 2015

Testable Design of Repeaterless Low Swing On-Chip Interconnect.
CoRR, 2015

A Clock Synchronizer for Repeaterless Low Swing On-Chip Links.
CoRR, 2015

2014
Implementation of high performance Readout Integrated Circuit.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Design considerations for high-CMRR low-power current mode instrumentation amplifier for biomedicai data acquisition systems.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

Ultra-low power neural stimulator for electrode interfaces.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

2013
A Variation Tolerant Current-Mode Signaling Scheme for On-Chip Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2013

800-nA Process-and-Voltage-Invariant 106-dB PSRR PTAT Current Reference.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Flexible Charge Balanced Stimulator With 5.6 fC Accuracy for 140 nC Injections.
IEEE Trans. Biomed. Circuits Syst., 2013

A Feed-Forward Equalizer for Capacitively Coupled On-Chip Interconnect.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

A capacitively coupled clock distribution network with correction for process dependent skew.
Proceedings of 2013 International Conference on IC Design & Technology, 2013

A 24 Vpp compliant biphasic stimulator for inductively powered animal behavior studies.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
Current Excitation Method for DeltaR Measurement in Piezo-Resistive Sensors With a 0.3-ppm Resolution.
IEEE Trans. Instrum. Meas., 2012

A process and temperature compensated current reference circuit in CMOS process.
Microelectron. J., 2012

A Low-Power Instrumentation System for Nano-Electro-Mechanical-Sensors for Environmental and Healthcare Applications.
J. Low Power Electron., 2012

A novel robust signaling scheme for high-speed low-power communication over long wires.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011
A novel architecture for improving slew rate in FinFET-based op-amps and OTAs.
Microelectron. J., 2011

A 16-Gbps 9mW Transmitter with FFE in 90nm CMOS Technology for Off-Chip Communication.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

A Low-Power Low-Skew Current-Mode Clock Distribution Network in 90nm CMOS Technology.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

CMOS low-noise signal conditioning with a novel differential "resistance to frequency" converter for resistive sensor applications.
Proceedings of the International SoC Design Conference, 2011

A low-cost, ultra sensitive hand-held system for explosive detection using piezo-resistive micro-cantilevers.
Proceedings of the International SoC Design Conference, 2011

Wirelessly powered stimulator and recorder for neuronal interfaces.
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011

Piezoresistive 6-MNA coated microcantilevers with signal conditioning circuits for electronic nose.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

2010
Auto-BET-AMS: An automated device and circuit optimization platform to benchmark emerging technologies for performance and variability using an analog and mixed-signal design framework.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Low-power current-mode transceiver for on-chip bidirectional buses.
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

2009
A Multi-Criteria Procedure for the User Interface Components Layout Problem.
Asia Pac. J. Oper. Res., 2009

A process variation tolerant, high-speed and low-power current mode signaling scheme for on-chip interconnects.
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009

2008
An Ultra-Low-Power Current-Mode Integrated CMOS Instrumentation amplifier for Personal ECG Recorders.
J. Circuits Syst. Comput., 2008

Human-computer interaction design with multi-goal facilities layout model.
Comput. Math. Appl., 2008

Low power current mode receiver with inductive input impedance.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

2007
Finding the shortest path in stochastic networks.
Comput. Math. Appl., 2007

Finding shortest path in the presence of barriers: An alternate approach.
Appl. Math. Comput., 2007

2006
Computation of arc length in the presence of barriers in networks.
Appl. Math. Comput., 2006


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