Seiya Kasai

According to our database, Seiya Kasai authored at least 18 papers between 2005 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2021

Resource-saving FPGA Implementation of the Satisfiability Problem Solver: AmoebaSATslim.

Ying Jie Yan, Hideharu Amano, Masashi Aono, Kaori Ohkoda, Shingo Fukuda, Kenta Saito, Seiya Kasai

Proceedings of the International Conference on Field-Programmable Technology, 2021

2018

Amoeba-inspired Electronic Computing System and its Application to Autonomous Walking of a Multi-legged Robot.

Kenta Saito, Naoki Suefuji, Seiya Kasai, Masashi Aono

FLAP, 2018

Amoeba-Inspired Electronic Solution-Searching System and Its Application to Finding Walking Maneuver of a Multi-legged Robot.

Kenta Saito, Naoki Suefuji, Seiya Kasai, Masashi Aono

Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

2017

Implementation of a noise-coexistence threshold logic architecture on a GaAs-based nanowire FET network.

Ryota Kuroda, Seiya Kasai

Int. J. Parallel Emergent Distributed Syst., 2017

2016

Design Framework of Image Sensor System Based on Dynamic Range Extension by Adding Noise for Saturated Conditions.

Yukihiro Tadokoro, Seiya Kasai, Akihisa Ichiki, Hiroya Tanaka

IEEE Trans. Syst. Man Cybern. Syst., 2016

2015

Analysis on Non-Ideal Nonlinear Characteristics of Graphene-Based Three-Branch Nano-Junction Device.

Xiang Yin, Masaki Sato, Seiya Kasai

IEICE Trans. Electron., 2015

Concept, analysis, and demonstration of a novel delay network exhibiting stochastic resonance induced by external noise.

Yukihiro Tadokoro, Seiya Kasai, Akihisa Ichiki

Digit. Signal Process., 2015

2013

Introduction to Noise-Resilient Computing

Svetlana N. Yanushkevich, Seiya Kasai, Golam Tangim

Synthesis Lectures on Digital Circuits and Systems, Morgan & Claypool Publishers, ISBN: 978-3-031-79855-9, 2013

Noise-Tolerant Model of a Ternary Inverter Based on Markov Random Field.

Golam Tangim, Svetlana N. Yanushkevich, Seiya Kasai, Vlad P. Shmerko

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

2009

Investigation on Stochastic Resonance in Quantum Dot and Its Summing Network.

Seiya Kasai

Int. J. Nanotechnol. Mol. Comput., 2009

Multiple-Valued Logic Gates Using Asymmetric Single-Electron Transistors.

Wancheng Zhang, Nan-Jian Wu, Tamotsu Hashizume, Seiya Kasai

Proceedings of the ISMVL 2009, 2009

Multi-path Switching Device Utilizing a Multi-terminal Nanowire Junction for MDD-Based Logic Circuit.

Seiya Kasai, Yuta Shiratori, Kensuke Miura, Nan-Jian Wu

Proceedings of the ISMVL 2009, 2009

2008

Fabrication and Characterization of Active and Sequential Circuits Utilizing Schottky-Wrap-Gate-Controlled GaAs Hexagonal Nanowire Network Structures.

Hong-Quan Zhao, Seiya Kasai, Tamotsu Hashizume, Nan-Jian Wu

IEICE Trans. Electron., 2008

2007

Multiple Path Switching Device Utilizing Size-Controlled Nano-Schottky Wrap Gates for MDD-Based Logic Circuits.

Seiya Kasai, Tatsuya Nakamura, Yuta Shiratori

J. Multiple Valued Log. Soft Comput., 2007

Novel structure of GaAs-based interdigital-gated HEMT plasma devices for solid-state THz wave amplifier.

Abdul Manaf Hashim, Seiya Kasai, Kouichi Iizuka, Tamotsu Hashizume, Hideki Hasegawa

Microelectron. J., 2007

Integration of interdigital-gated plasma wave device for proximity communication system application.

Abdul Manaf Hashim, Seiya Kasai, Tamotsu Hashizume, Hideki Hasegawa

Microelectron. J., 2007

2006

Future of Heterostructure Microelectronics and Roles of Materials Research for Its Progress.

Hideki Hasegawa, Seiya Kasai, Taketomo Sato, Tamotsu Hashizume

IEICE Trans. Electron., 2006

2005

III-V Compound Semiconductor Nanotechnology for Smart Systems.

Hideki Hasegawa, Seiya Kasai

Proceedings of the 2005 International Conference on MEMS, 2005