Senthil Jayapal

According to our database1, Senthil Jayapal authored at least 8 papers between 2005 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2016
Stack effect and logic restructuring on high Fan-in FinFETs logic gates.
Proceedings of the International Symposium on Integrated Circuits, 2016

2012
A 40 nm Dual-Width Standard Cell Library for Near/Sub-Threshold Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
A 40 nm inverse-narrow-width-effect-aware sub-threshold standard cell library.
Proceedings of the 48th Design Automation Conference, 2011

The impact of inverse narrow width effect on sub-threshold device sizing.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Energy efficient computation with self-adaptive single-ended body bias.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

2006
Precharge Node based Variable Forward Body Bias for Low-Energy LSIs.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005
Efficiency of Leakage Reduction Techniques on Different Static Logic Styles for Embedded Portable Applications with High Standby to Active Time Ratio.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Optimization of Electronic Power Consumption in Wireless Sensor Nodes.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005


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