Jan Stuijt

According to our database1, Jan Stuijt authored at least 10 papers between 2010 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Synthesizable Memory Arrays Based on Logic Gates for Subthreshold Operation in IoT.
IEEE Trans. on Circuits and Systems, 2019

ECG-based Heartbeat Classification in Neuromorphic Hardware.
Proceedings of the International Joint Conference on Neural Networks, 2019

2017
Re-addressing SRAM design and measurement for sub-threshold operation in view of classic 6T vs. standard cell based implementations.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Towards SRAM leakage power minimization by aggressive standby voltage scaling - Experiments on 40nm test chips.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

2016
Memories for NTC.
Proceedings of the Near Threshold Computing, Technology, Methods and Applications., 2016

2014
Approximate compressed sensing: ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

Resolving the memory bottleneck for single supply near-threshold computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2011
A 36μW heartbeat-detection processor for a wireless sensor node.
ACM Trans. Design Autom. Electr. Syst., 2011

2010
Energy efficient computation with self-adaptive single-ended body bias.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Novel wide voltage range level shifter for near-threshold designs.
Proceedings of the 17th IEEE International Conference on Electronics, 2010


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