Jun Zhou

Orcid: 0000-0003-2098-9621

Affiliations:
  • University of Electronic Science and Technology of China, Smart ICs and Systems Research Group, Chengdu, China
  • A*STAR, Institute of Microelectronics, Singapore (former)
  • Newcastle University, Newcastle upon Tyne, UK (PhD 2008)


According to our database1, Jun Zhou authored at least 100 papers between 2011 and 2024.

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Timeline

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Bibliography

2024
An Energy-Efficient Visual Object Tracking Processor Exploiting Domain-Specific Features.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

General Purpose Deep Learning Accelerator Based on Bit Interleaving.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

HISPOC: A High-Performance Irregular Activation Sparsity-Aware Point Cloud Network Accelerator.
IEEE Trans. Circuits Syst. II Express Briefs, April, 2024

HDSuper: High-Quality and High Computational Utilization Edge Super-Resolution Accelerator With Hardware-Algorithm Co-Design Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

IPOCIM: Artificial Intelligent Architecture Design Space Exploration With Scalable Ping-Pong Computing-in-Memory Macro.
IEEE Trans. Very Large Scale Integr. Syst., February, 2024

14.8 KASP: A 96.8% 10-Keyword Accuracy and 1.68μJ/Classification Keyword Spotting and Speaker Verification Processor Using Adaptive Beamforming and Progressive Wake-Up.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

33.1 A High-Accuracy and Energy-Efficient Zero-Shot-Retraining Seizure-Detection Processor with Hybrid-Feature-Driven Adaptive Processing and Learning-Based Adaptive Channel Selection.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

An FPGA-based Ultra-High Performance and Scalable Optical Flow Hardware Accelerator for Autonomous Driving.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

An Ultra-Low Power Time-Domain based SNN Processor for ECG Classification.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Stellar: Energy-Efficient and Low-Latency SNN Algorithm and Hardware Co-Design with Spatiotemporal Computation.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023
A High Accuracy and Low Power CNN-Based Environmental Sound Classification Processor.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

BOHA: A High Performance VSLAM Backend Optimization Hardware Accelerator Using Recursive Fine-Grain H-Matrix Decomposition and Early-Computing With Approximate Linear Solver.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

TDPRO: Time-Domain-Based Computing-in Memory Engine for Ultra-Low Power ECG Processor.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2023

An Ultra-Low Power Reconfigurable Biomedical AI Processor With Adaptive Learning for Versatile Wearable Intelligent Health Monitoring.
IEEE Trans. Biomed. Circuits Syst., October, 2023

Introduction to the Special Section on the 2022 Asian Solid-State Circuits Conference (A-SSCC).
IEEE J. Solid State Circuits, October, 2023

ADAS: A High Computational Utilization Dynamic Reconfigurable Hardware Accelerator for Super Resolution.
ACM Trans. Reconfigurable Technol. Syst., September, 2023

BSN-ESC: A Big-Small Network-Based Environmental Sound Classification Method for AIoT Applications.
Sensors, August, 2023

NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN.
IEEE Trans. Circuits Syst. II Express Briefs, 2023

DL-VOPU: An Energy-Efficient Domain-Specific Deep-Learning-Based Visual Object Processing Unit Supporting Multi-Scale Semantic Feature Extraction for Mobile Object Detection/Tracking Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A FPGA-Based Iterative 6DoF Pose Refinement Processing Unit for Fast and Energy-Efficient Pose Estimation in Picking Robots.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023

Measurement and Analysis of End Jitter of Six-Axis Industrial Robots.
Proceedings of the Intelligent Robotics and Applications - 16th International Conference, 2023

HDSuper: Algorithm-Hardware Co-design for Light-weight High-quality Super-Resolution Accelerator.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

A Lightweight Convolutional Neural Network for Atrial Fibrillation Detection Using Dual-Channel Binary Features from Single-Lead Short ECG.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Multi-Dimensional Feature Combination Method for Continuous Blood Pressure Measurement Based on Wrist PPG Sensor.
IEEE J. Biomed. Health Informatics, 2022

ULECGNet: An Ultra-Lightweight End-to-End ECG Classification Neural Network.
IEEE J. Biomed. Health Informatics, 2022

MobileSP: An FPGA-Based Real-Time Keypoint Extraction Hardware Accelerator for Mobile VSLAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An Ultra-Energy-Efficient and High Accuracy ECG Classification Processor With SNN Inference Assisted by On-Chip ANN Learning.
IEEE Trans. Biomed. Circuits Syst., 2022

AdaSG: A Lightweight Feature Point Matching Method Using Adaptive Descriptor with GNN for VSLAM.
Sensors, 2022

SAS-SEINet: A SNR-Aware Adaptive Scalable SEI Neural Network Accelerator Using Algorithm-Hardware Co-Design for High-Accuracy and Power-Efficient UAV Surveillance.
Sensors, 2022

SCA: Search-Based Computing Hardware Architecture with Precision Scalable and Computation Reconfigurable Scheme.
Sensors, 2022

ULSED: An ultra-lightweight SED model for IoT devices.
J. Parallel Distributed Comput., 2022

<i>LCSED</i>: A low complexity CNN based SED model for IoT devices.
Neurocomputing, 2022

A Robust and Lightweight Environmental Sound Classification Technique with Adaptation to Microphone for AIoT Sound Sensing.
Proceedings of the 19th International SoC Design Conference, 2022

ReverSearch: Search-based energy-efficient Processing-in-Memory Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

TDPRO: Ultra-low Power ECG Processor with High-Precision Time-Domain Computing Engine.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

IPOCIM: Artificial Intelligent Processor with Adaptive Ping-pong Computing-in-Memory Architecture.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

An energy-efficient seizure detection processor using event-driven multi-stage CNN classification and segmented data processing with adaptive channel selection.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

An Energy-Efficient Cardiac Arrhythmia Classification Processor using Heartbeat Difference based Classification and Event-Driven Neural Network Computation with Adaptive Wake-Up.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

Pipelined Computing-in-Memory Macro with Computation-Memory Aware Technique.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021
A Fast and Energy-Efficient SNN Processor With Adaptive Clock/Event-Driven Computation Scheme and Online Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Magnetic Resistance Sensory System for the Quantitative Measurement of Morphine.
IEEE Trans. Biomed. Circuits Syst., 2021

A Lightweight Pedestrian Detection Engine with Two-Stage Low-Complexity Detection Network and Adaptive Region Focusing Technique.
Sensors, 2021

Keyword spotting techniques to improve the recognition accuracy of user-defined keywords.
Neural Networks, 2021

A Weight Importance Analysis Technique for Area- and Power-Efficient Binary Weight Neural Network Processor Design.
Cogn. Comput., 2021

Energy-efficient computing-in-memory architecture for AI processor: device, circuit, architecture perspective.
Sci. China Inf. Sci., 2021

A Review of Convolutional Neural Networks Hardware Accelerators for AIoT Edge Computing.
Proceedings of the International Conference on UK-China Emerging Technologies, 2021

4.5 BioAIP: A Reconfigurable Biomedical AI Processor with Adaptive Learning for Versatile Intelligent Health Monitoring.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A Survey on Feature Point Extraction Techniques.
Proceedings of the 18th International SoC Design Conference, 2021

Trend of Emerging Non-Volatile Memory for AI Processor.
Proceedings of the 18th International SoC Design Conference, 2021

Energy-Efficient Spin-Orbit Torque MRAM Operations for Neural Network Processor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Power-Efficient Specific Emitter Identification Hardware Accelerator With SNR-Aware Adaptive Precision Reconfiguration.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

Towards Intelligent-Edge Computing: Application, Architecture, Circuit, and Device Perspective.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A High Accuracy & Low Power EDR Estimation Processor for Wearable Devices.
Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

RAODAT: An Energy-Efficient Reconfigurable AI-based Object Detection and Tracking Processor with Online Learning.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
TSE-CNN: A Two-Stage End-to-End CNN for Human Activity Recognition.
IEEE J. Biomed. Health Informatics, 2020

Guest Editorial: Special Section on AI-Based Biomedical Circuits and Systems.
IEEE Trans. Biomed. Circuits Syst., 2020

A Review of Algorithm & Hardware Design for AI-Based Biomedical Applications.
IEEE Trans. Biomed. Circuits Syst., 2020

A Biological Retina Inspired Tone Mapping Processor for High-Speed and Energy-Efficient Image Enhancement.
Sensors, 2020

Corrigendum to"Approximate error detection-correction for efficient adaptive voltage Over-Scaling"[Integration 63 (2018) 220-231].
Integr., 2020

Adaptable Map Matching Using PF-net for Pedestrian Indoor Localization.
IEEE Commun. Lett., 2020

Scalability Analysis and Modeling of XPoint-based MRAM.
Proceedings of the International SoC Design Conference, 2020

PRISM: Energy-Efficient Polymorphic Operation Based on Spin-Orbit Torque Memory for Reconfigurable Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Fast and Efficient FPGA-based Level Set Hardware Accelerator for Image Segmentation.
Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Energy-Efficient Intelligent ECG Monitoring for Wearable Devices.
IEEE Trans. Biomed. Circuits Syst., 2019

A Power-Efficient Programmable DCNN Processor for Intelligent Sensing.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

A High Throughput and Energy-Efficient Retina-Inspired Tone Mapping Processor.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

A Two-Stage Parameter Identification Method and Compensation Verification for Heavy Load Robot.
Proceedings of the 4th International Conference on Control, Robotics and Cybernetics, 2019

2018
A 1-V to 0.29-V sub-100-pJ/operation ultra-low power fast-convergence CORDIC processor in 0.18-μm CMOS.
Microelectron. J., 2018

Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling.
Integr., 2018

RNS-Based Embedding Scheme for Data Hiding in Digital Images.
Proceedings of the 17th IEEE International Conference On Trust, 2018

A FPGA-based RO PUF with LUT-Based Self-Compare Structure and Adaptive Counter Time Period Tuning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
An Ultra-Low Power Turning Angle Based Biomedical Signal Compression Engine with Adaptive Threshold Tuning.
Sensors, 2017

A 0.4 V 12T 2RW dual-port SRAM with suppressed common-row-access disturbance.
Microelectron. J., 2017

Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling.
Proceedings of the VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things, 2017

Near-threshold processor design techniques for power-constrained computing devices.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A Power and Area Efficient Ultra-Low Voltage Laplacian Pyramid Processing Engine With Adaptive Data Compression.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A 151-nW Adaptive Delta-Sampling ADC for Ultra-Low Power Sensing Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A 12.77-MHz 31 ppm/°C On-Chip RC Relaxation Oscillator With Digital Compensation Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

A 65-nm 0.35-V 7.1-μW memory-less adaptive PCG processor for wearable long-term cardiac monitoring.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

A 5.1Gb/s 60.3fJ/bit/mm PVT tolerant NoC transceiver.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015
An Area- and Energy-Efficient FIFO Design Using Error-Reduced Data Compression and Near-Threshold Operation for Image/Video Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2015

An Ultra-Low Voltage Level Shifter Using Revised Wilson Current Mirror for Fast and Energy-Efficient Wide-Range Voltage Conversion from Sub-Threshold to I/O Voltage.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

BIST Methodology, Architecture and Circuits for Pre-Bond TSV Testing in 3D Stacking IC Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Near-Threshold Energy- and Area-Efficient Reconfigurable DWPT/DWT Processor for Healthcare-Monitoring Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Design of an Ultra-low Voltage 9T SRAM With Equalized Bitline Leakage and CAM-Assisted Energy Efficiency Improvement.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

An Ultralow-Voltage Sensor Node Processor With Diverse Hardware Acceleration and Cognitive Sampling for Intelligent Sensing.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Fast and energy-efficient low-voltage level shifters.
Microelectron. J., 2015

SRAM devices and circuits optimization toward energy efficiency in multi-V<sub>th</sub> CMOS.
Microelectron. J., 2015

A 0.5V power and area efficient Laplacian Pyramid processing engine using FIFO with adaptive data compression.
Proceedings of the ESSCIRC Conference 2015, 2015

A 12.77-MHz on-chip relaxation oscillator with digital compensation for loop delay variation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

Opportunities and challenges: Ultra-low voltage digital IC design techniques.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring.
IEEE J. Solid State Circuits, 2014

30.7 A 60Mb/s wideband BCC transceiver with 150pJ/b RX and 31pJ/b TX for emerging wearable applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

An area- and power-efficient FIFO with error-reduced data compression for image/video processing.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A sub-threshold to super-threshold Level Conversion Flip Flop for sub/near-threshold dual-supply operation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2012
A 40 nm Dual-Width Standard Cell Library for Near/Sub-Threshold Operation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
A 40 nm inverse-narrow-width-effect-aware sub-threshold standard cell library.
Proceedings of the 48th Design Automation Conference, 2011

Exploring AMBA AXI on-Chip interconnection for TSV-based 3D SoCs.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011


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