Seong-I Lei

According to our database1, Seong-I Lei authored at least 6 papers between 2011 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Minimum Implant Area-Aware Placement and Threshold Voltage Refinement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

2016
Optimizing Pin Assignment and Escape Routing for Blind-via-Based PCBs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Minimum implant area-aware placement and threshold voltage refinement.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2014
Double patterning-aware detailed routing with mask usage balancing.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

2013
Simultaneous Constrained Pin Assignment and Escape Routing Considering Differential Pairs for FPGA-PCB Co-Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2011
Simultaneous Constrained Pin Assignment and Escape Routing for FPGA-PCB Codesign.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011


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