Sergi Vilardell

Orcid: 0000-0001-7523-6761

According to our database1, Sergi Vilardell authored at least 5 papers between 2019 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Using Markov's Inequality with Power-Of-k Function for Probabilistic WCET Estimation.
Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

2021
MUCH: exploiting pairwise hardware event monitor correlations for improved timing analysis of complex MPSoCs.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

2020
HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

CleanET: enabling timing validation for complex automotive systems.
Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

2019
Software Timing Analysis for Complex Hardware with Survivability and Risk Analysis.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019


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