Shashank Adavally

According to our database1, Shashank Adavally authored at least 6 papers between 2018 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2022
HETEROGENEOUS ARCHITECTURE FOR SPARSE DATA PROCESSING.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

2021
Dynamically Adapting Page Migration Policies Based on Applications' Memory Access Behaviors.
ACM J. Emerg. Technol. Comput. Syst., 2021

2020
On-the-fly Page Migration and Address Reconciliation for Heterogeneous Memory Systems.
ACM J. Emerg. Technol. Comput. Syst., 2020

Towards Application-Specific Address Mapping for Emerging Memory Devices.
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

ExPress: Simultaneously Achieving Storage, Execution and Energy Efficiencies in Moderately Sparse Matrix Computations.
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

2018
3D-DRAM Performance for Different OpenMP Scheduling Techniques in Multicore Systems.
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018


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