Shih-Nung Wei

According to our database, Shih-Nung Wei authored at least 5 papers between 2012 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A Low-Area, Low-Power, and Low-Leakage Error-Detecting Latch for Timing-Error Resilient System Designs.

Chien-Tung Liu, Zhe-Wei Chang, Shih-Nung Wei, Jinn-Shyan Wang, Tay-Jyi Lin

Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

2017

Process/Voltage/Temperature-Variation-Aware Design and Comparative Study of Transition-Detector-Based Error-Detecting Latches for Timing-Error-Resilient Pipelined Systems.

Jinn-Shyan Wang, Shih-Nung Wei

IEEE Trans. Very Large Scale Integr. Syst., 2017

2015

Range Unlimited Delay-Interleaving and -Recycling Clock Skew Compensation and Duty-Cycle Correction Circuit.

Yi-Ming Wang, Shih-Nung Wei

IEEE Trans. Very Large Scale Integr. Syst., 2015

2012

A range extending delay-recycled clock skew-compensation and/or duty-cycle-correction circuit.

Shih-Nung Wei, Yi-Ming Wang, Jyun-Hua Peng, Yuandi Surya

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

An output tracking delay-recycled clock skew-compensation and/or duty-cycle-correction circuit.

Shih-Nung Wei, Yi-Ming Wang, Jyun-Hua Peng

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012