Shin-Kai Chen

According to our database, Shin-Kai Chen authored at least 11 papers between 2005 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

A Low-Error, Cost-Efficient Design Procedure for Evaluating Logarithms to Be Used in a Logarithmic Arithmetic Processor.

Chih-Wei Liu, Shih-Hao Ou, Kuo-Chiang Chang, Tsung-Ching Lin, Shin-Kai Chen

IEEE Trans. Computers, 2016

2014

Parallelizing Complex Streaming Applications on Distributed Scratchpad Memory Multicore Architecture.

Shin-Kai Chen, Cheng-Yu Hung, Ching-Chih Chen, Chih-Wei Liu

Int. J. Parallel Program., 2014

Optimized memory access support for data layout conversion on heterogeneous multi-core systems.

Chia-Chen Hsu, Cheng-Yen Lin, Shin-Kai Chen, Chih-Wei Liu, Jenq Kuen Lee

Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014

2013

Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM).

Shin-Kai Chen, Chih-Wei Liu, Tsung-Yi Wu, An-Chi Tsai

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A low-error and Rom-free logarithmic arithmetic unit for embedded 3D graphics applications.

Tsung-Ching Lin, Shin-Kai Chen, Chih-Wei Liu

Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

2012

Early Stage Codesign of Multi-PE SIMD Engine: A Case Study on Object Detection.

Shin-Kai Chen, Sheng-Yun Wu, Yu-Kai Yen, Chih-Wei Liu

Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

2009

Parallel object detection on multicore platforms.

Shin-Kai Chen, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

2008

Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications.

Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao

J. Signal Process. Syst., 2008

2007

Rapid C to FPGA Prototyping with Multithreaded Emulation Engine.

Shin-Kai Chen, Bing-Shiun Wang, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Hierarchical instruction encoding for VLIW digital signal processors.

Chia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A unified processor architecture for RISC & VLIW DSP.

Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005