Pi-Chen Hsiao

According to our database, Pi-Chen Hsiao authored at least 5 papers between 2005 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2010

Collaborative voltage scaling with online STA and variable-latency datapath.

Tay-Jyi Lin, Pi-Chen Hsiao, Chi-Hung Lin, Shu-Chang Kuo, Chou-Kun Lin, Yu-Ting Kuo, Chih-Wei Liu, Yuan-Hua Chu

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2008

Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications.

Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao

J. Signal Process. Syst., 2008

2007

Latency-Tolerant Virtual Cluster Architecture for VLIW DSP.

Pi-Chen Hsiao, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Hierarchical instruction encoding for VLIW digital signal processors.

Chia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A unified processor architecture for RISC & VLIW DSP.

Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005