Chih-Wei Liu

According to our database, Chih-Wei Liu authored at least 68 papers between 1999 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Voltage Control of IPMSM Servo Drive in Constant Power Region With Intelligent Parameter Estimation.

Faa-Jeng Lin, Chih-Wei Liu, Po-Lun Wang

IEEE Access, 2022

2021

Area Efficient High-Performance Digitally Controlled Power Management Unit.

Chih-Wei Liu, Le-Ren Chang-Chien

IEEE Trans. Ind. Electron., 2021

Phase sequence interchange scheme for suppressing transient cross regulation on the compensator controlled and non-compensator controlled single-inductor dual-output buck converter.

Chun-Hsun Wu, Bu-Wei Chen, Wei-Hung Ko, Chih-Wei Liu, Le-Ren Chang-Chien

IET Circuits Devices Syst., 2021

CSAnet: High Speed Channel Spatial Attention Network for Mobile ISP.

Ming-Chun Hsyu, Chih-Wei Liu, Chao-Hung Chen, Chao-Wei Chen, Wen-Chia Tsai

Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2021

2020

Auto-tuning charge balance control for improving transient response on buck converter.

Chih-Wei Liu, Hung-Yu Chen, Le-Ren Chang-Chien

Int. J. Circuit Theory Appl., 2020

Design of a High-Throughput and Area-Efficient Ultra-Long FFT Processor.

Hong-Ke Lin, Pin-Han Lin, Chih-Wei Liu

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

A Low Latency NN-Based Cyclic Jacobi EVD Processor for DOA Estimation in Radar System.

Chih-Wei Liu, Jia-Yu Wu, Kang-Chun Huang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Pipeline Signal Process Scheme for Saving Power Module Controllers in Power Management Unit.

Chih-Wei Liu, Le-Ren Chang-Chien

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

FFT-Based Multirate Signal Processing for 18-Band Quasi-ANSI S1.11 1/3-Octave Filter Bank.

Chih-Wei Liu, Chia-Kai Chan, Po-Hsiang Cheng, Hsin-Yuan Lin

IEEE Trans. Circuits Syst. II Express Briefs, 2019

Energy Efficient CNN Inference Accelerator Using Fast Fourier Transform.

Ya-Chin Chung, Po-Hsiang Cheng, Chih-Wei Liu

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

High-Throughput 64K-point FFT Processor for THz Imaging Radar System.

Chia-Kai Chan, Hong-Ke Lin, Chih-Wei Liu

Proceedings of the International Symposium on VLSI Design, Automation and Test, 2019

2018

Effects of banner Ad shape and the schema creating process on consumer internet browsing behavior.

Chih-Wei Liu, Shao-Kang Lo, Ai-Yun Hsieh, Yujong Hwang

Comput. Hum. Behav., 2018

2017

What consumers see when time is running out: Consumers' browsing behaviors on online shopping websites when under time pressure.

Chih-Wei Liu, Ai-Yun Hsieh, Shao-Kang Lo, Yujong Hwang

Comput. Hum. Behav., 2017

2016

A Low-Error, Cost-Efficient Design Procedure for Evaluating Logarithms to Be Used in a Logarithmic Arithmetic Processor.

Chih-Wei Liu, Shih-Hao Ou, Kuo-Chiang Chang, Tsung-Ching Lin, Shin-Kai Chen

IEEE Trans. Computers, 2016

A Systematic ANSI S1.11 Filter Bank Specification Relaxation and Its Efficient Multirate Architecture for Hearing-Aid Systems.

Cheng-Yen Yang, Chih-Wei Liu, Shyh-Jye Jou

IEEE ACM Trans. Audio Speech Lang. Process., 2016

Binaural-cue-based noise reduction using multirate quasi-ANSI filter bank for hearing aids.

Huei-Shiuan Tang, Cheng-Yen Yang, Chih-Wei Liu, Chia-Cheng Chien

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

DeAr: A framework for power-efficient and flexible embedded digital signal processor design.

Chi-Ming Lee, Yong-Jyun Huang, Chih-Wei Liu, Yarsun Hsu

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015

An energy-efficient, high-precision SFP LPFIR filter engine for digital hearing aids.

Shih-Hao Ou, Kuo-Chiang Chang, Chih-Wei Liu

Integr., 2015

2014

Separate Clock Network Voltage for Correcting Random Errors in ULV Clocked Storage Cells.

Shien-Chun Luo, Kuo-Chiang Chang, Ming-Pin Chen, Ching-Ji Huang, Yi-Fang Chiu, Po-Hsun Chen, Liang-Chia Cheng, Chih-Wei Liu, Yuan-Hua Chu

IEEE Trans. Circuits Syst. II Express Briefs, 2014

Parallelizing Complex Streaming Applications on Distributed Scratchpad Memory Multicore Architecture.

Shin-Kai Chen, Cheng-Yu Hung, Ching-Chih Chen, Chih-Wei Liu

Int. J. Parallel Program., 2014

Complexity-effective implementation of programmable FIR filters using simplified canonic signed digit multiplier.

Kuo-Chiang Chang, Ching-Hao Lin, Chih-Wei Liu

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014

Autonomous tuning method for realizing optimal adaptive voltage positioning scheme.

Chih-Wei Liu, Le-Ren Chang-Chien

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

An ultra-low voltage hearing aid chip using variable-latency design technique.

Kuo-Chiang Chang, Shien-Chun Luo, Ching-Ji Huang, Chih-Wei Liu, Yuan-Hua Chu, Shyh-Jye Jou

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

An efficient 18-band quasi-ANSI 1/3-octave filter bank using re-sampling method for digital hearing aids.

Cheng-Yen Yang, Chih-Wei Liu, Shyh-Jye Jou

Proceedings of the IEEE International Conference on Acoustics, 2014

Optimized memory access support for data layout conversion on heterogeneous multi-core systems.

Chia-Chen Hsu, Cheng-Yen Lin, Shin-Kai Chen, Chih-Wei Liu, Jenq Kuen Lee

Proceedings of the 12th IEEE Symposium on Embedded Systems for Real-time Multimedia, 2014

2013

10-ms 18-Band Quasi-ANSI S1.11 1/3-Octave Filter Bank for Digital Hearing Aids.

Chih-Wei Liu, Kuo-Chiang Chang, Ming-Hsun Chuang, Ching-Hao Lin

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Design and Implementation of High-Speed and Energy-Efficient Variable-Latency Speculating Booth Multiplier (VLSBM).

Shin-Kai Chen, Chih-Wei Liu, Tsung-Yi Wu, An-Chi Tsai

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A low-error and Rom-free logarithmic arithmetic unit for embedded 3D graphics applications.

Tsung-Ching Lin, Shin-Kai Chen, Chih-Wei Liu

Proceedings of the 2013 International Symposium on VLSI Design, Automation, and Test, 2013

Spatial-cue-based multi-band binaural noise reduction for hearing aids.

Cheng-Yen Yang, Wen-Sheng Chou, Kuo-Chiang Chang, Chih-Wei Liu, Tai-Shih Chi, Shyh-Jye Jou

Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

A successful application of big data storage techniques implemented to criminal investigation for telecom.

Ju-Chi Tseng, Hsin-Cheng Tseng, Chih-Wei Liu, Chia Chun Shih, Kuo-Yu Tseng, Cheng-Yu Chou, Chia-Hsuan Yu, Fang-Sun Lu

Proceedings of the 15th Asia-Pacific Network Operations and Management Symposium, 2013

2012

Design and implementation of 18-band Quasi-ANSI S1.11 1/3-octave filter bank for digital hearing aids.

Ching-Hao Lin, Kuo-Chiang Chang, Ming-Hsun Chuang, Chih-Wei Liu

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

A smart stream controller for efficient implementation of streaming applications on the heterogeneous multicore processor.

Shih-Hao Ou, Che-Wei Yeh, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A low power hearing aid computing platform using lightweight processing elements.

Kuo-Chiang Chang, Yu-Wen Chen, Yu-Ting Kuo, Chih-Wei Liu

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Early Stage Codesign of Multi-PE SIMD Engine: A Case Study on Object Detection.

Shin-Kai Chen, Sheng-Yun Wu, Yu-Kai Yen, Chih-Wei Liu

Proceedings of the 41st International Conference on Parallel Processing Workshops, 2012

Complexity-effective auditory compensation with a controllable filter for digital hearing aids.

Ya-Ting Chang, Kuo-Chiang Chang, Yu-Ting Kuo, Chih-Wei Liu

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Challenges of system virtualization.

Cheng-Yu Chou, Chih-Wei Liu, Kuo-Yu Tseng, Chien-Wei Cheng, Fang-Sun Lu

Proceedings of the 14th Asia-Pacific Network Operations and Management Symposium, 2012

2011

Complexity-Aware Quantization and Lightweight VLSI Implementation of FIR Filters.

Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu

EURASIP J. Adv. Signal Process., 2011

2010

Design and Implementation of Low-Power ANSI S1.11 Filter Bank for Digital Hearing Aids.

Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chih-Wei Liu

IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Improving energy efficiency of functional units by exploiting their data-dependent latency.

Shih-Hao Ou, Yen-Cheng Lin, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Complexity-effective dynamic range compression for digital hearing aids.

Kuo-Chiang Chang, Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Collaborative voltage scaling with online STA and variable-latency datapath.

Tay-Jyi Lin, Pi-Chen Hsiao, Chi-Hung Lin, Shu-Chang Kuo, Chou-Kun Lin, Yu-Ting Kuo, Chih-Wei Liu, Yuan-Hua Chu

Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

Support of Android lab modules for embedded system curriculum.

Meng-Ting Wang, Po-Chun Huang, Jenq Kuen Lee, Shang-Hong Lai, Jyh-Shing Roger Jang, Chun-Fa Chang, Chih-Wei Liu, Tei-Wei Kuo, Steve Liao

Proceedings of the 2010 Workshop on Embedded Systems Education, 2010

2009

Parallel object detection on multicore platforms.

Shin-Kai Chen, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the IEEE Workshop on Signal Processing Systems, 2009

Ultra low-power ANSI S1.11 filter bank for digital hearing aids.

Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Chou-Kun Lin, Chih-Wei Liu

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Design and Implementation of a High-Performance and Complexity-Effective VLIW DSP for Multimedia Applications.

Tay-Jyi Lin, Shin-Kai Chen, Yu-Ting Kuo, Chih-Wei Liu, Pi-Chen Hsiao

J. Signal Process. Syst., 2008

Improving datapathutilization of programmable DSP with composite functional units.

Shih-Hao Ou, Yi Cho, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Complexity-effective auditory compensation for digital hearing aids.

Yu-Ting Kuo, Tay-Jyi Lin, Wei-Han Chang, Yueh-Tai Li, Chih-Wei Liu, Shuenn-Tsong Young

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Multithreaded coprocessor interface for multi-core multimedia SoC.

Shih-Hao Ou, Tay-Jyi Lin, Xiang Sheng Deng, Zhi Hong Zhuo, Chih-Wei Liu

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

Self-Compensation Technique for Simplified Belief-Propagation Algorithm.

Yen-Chin Liao, Chien-Ching Lin, Hsie-Chia Chang, Chih-Wei Liu

IEEE Trans. Signal Process., 2007

A View of Gaussian Elimination Applied to Early-Stopped Berlekamp-Massey Algorithm.

Chih-Wei Liu, Chung-Chin Lu

IEEE Trans. Commun., 2007

A View of Gaussian Elimination Applied to Early Stopped Berklekamp-Massey Algorithm.

Chih-Wei Liu, Chung-Chin Lu

IEEE Trans. Commun., 2007

Latency-Tolerant Virtual Cluster Architecture for VLIW DSP.

Pi-Chen Hsiao, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Rapid C to FPGA Prototyping with Multithreaded Emulation Engine.

Shin-Kai Chen, Bing-Shiun Wang, Tay-Jyi Lin, Chih-Wei Liu

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Design of ANSI S1.11 Filter Bank for Digital Hearing Aids.

Yu-Ting Kuo, Tay-Jyi Lin, Yueh-Tai Li, Wei-Han Chang, Chih-Wei Liu, Shuenn-Tsong Young

Proceedings of the 14th IEEE International Conference on Electronics, 2007

Single-Issue 1500MIPS Embedded DSP with Ultra Compact Codes.

Li-Chun Lin, Shih-Hao Ou, Tay-Jyi Lin, Siang-Den Deng, Chih-Wei Liu

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

A Compact DSP Core with Static Floating-Point Arithmetic.

Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen

J. VLSI Signal Process., 2006

Carry Estimation for Two's Complement Fixed-Width Multipliers.

Yen-Chin Liao, Hsie-Chia Chang, Chih-Wei Liu

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

Programmable FIR filter with adder-based computing engine.

Yu-Ting Kuo, Tay-Jyi Lin, Yi Cho, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

KIDBSCAN: A New Efficient Data Clustering Algorithm.

Cheng-Fa Tsai, Chih-Wei Liu

Proceedings of the Artificial Intelligence and Soft Computing, 2006

A 52mW 1200MIPS compact DSP for multi-core media SoC.

Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting Kuo, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Hierarchical instruction encoding for VLIW digital signal processors.

Chia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Pipelining technique for energy-aware datapaths.

Wei-Sheng Huang, Tay-Jyi Lin, Shih-Hao Ou, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Architecture for area-efficient 2-D transform in H.264/AVC.

Yu-Ting Kuo, Tay-Jyi Lin, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 2005 IEEE International Conference on Multimedia and Expo, 2005

A unified processor architecture for RISC & VLIW DSP.

Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

2004

Static floating-point unit with implicit exponent tracking for embedded DSP.

Hung-Yueh Lin, Tay-Jyi Lin, Chie-Min Chao, Yen-Chin Liao, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A compact DSP core with static floating-point unit & its microcode generation.

Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chein-Wei Jen

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2000

Loss behavior in space priority queue with batch Markovian arrival process - discrete-time case.

Yung-Chung Wang, Chih-Wei Liu, Chung-Chin Lu

Perform. Evaluation, 2000

1999

A Systolic Array Implementation of the Feng-Rao Algorithm.

Chih-Wei Liu, Kuo-Tai Huang, Chung-Chin Lu

IEEE Trans. Computers, 1999