Shingo Mandai

According to our database1, Shingo Mandai authored at least 12 papers between 2009 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
11.4 A 67, 392-SPAD PVTB-compensated multi-channel digital SiPM with 432 column-parallel 48ps 17b TDCs for endoscopic time-of-flight PET.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2012
A fully-integrated 780×800μm<sup>2</sup> multi-digital silicon photomultiplier with column-parallel time-to-digital converter.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
Cascaded Time Difference Amplifier with Differential Logic Delay Cell.
IEICE Trans. Electron., 2011

Variable Length Coded Address Compression for High-Speed 3-D Range-Finder Using Light-Section Method.
IEICE Trans. Electron., 2011

1.0 ps Resolution Time-to-Digital Converter Based-On Cascaded Time-Difference-Amplifier Utilizing Differential Logic Delay Cells.
IEICE Trans. Electron., 2011

A 128-channel, 9ps column-parallel two-stage TDC based on time difference amplification for time-resolved imaging.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
Time Difference Amplifier with Robust Gain Using Closed-Loop Control.
IEICE Trans. Electron., 2010

A 8bit two stage time-to-digital converter using time difference amplifier.
IEICE Electron. Express, 2010

A 256×256 14k range maps/s 3-D range-finding image sensor using row-parallel embedded binary.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Time-to-digital converter based on time difference amplifier with non-linearity calibration.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

Cascaded time difference amplifier using differential logic delay cell.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Dual Imager Core Chip with 24.8 Rangemaps/s 3-D and 58 fps 2-D Simultaneous Capture Capability.
IEICE Trans. Electron., 2009


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