Edoardo Charbon

According to our database1, Edoardo Charbon authored at least 119 papers between 1992 and 2020.

Collaborative distances:

Awards

IEEE Fellow

IEEE Fellow 2017, "For contributions to solid-state single photon avalanche detectors and their applications in imaging".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2020
Quanta burst photography.
ACM Trans. Graph., 2020

Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control.
IEEE Trans. Circuits Syst., 2020

Toward the Super Temporal Resolution Image Sensor with a Germanium Photodiode for Visible Light.
Sensors, 2020

A Wideband Low-Power Cryogenic CMOS Circulator for Quantum Applications.
IEEE J. Solid State Circuits, 2020

Introduction to the Special Issue on the 2020 IEEE International Solid-State Circuits Conference (ISSCC).
IEEE J. Solid State Circuits, 2020

A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons.
IEEE J. Solid State Circuits, 2020

19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

19.3 A 200dB FoM 4-to-5GHz Cryogenic Oscillator with an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Cryo-CMOS for Analog/Mixed-Signal Circuits and Systems.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
Modeling and Analysis of a Direct Time-of-Flight Sensor Architecture for LiDAR Applications.
Sensors, 2019

Light-In-Flight Imaging by a Silicon Image Sensor: Toward the Theoretical Highest Frame Rate.
Sensors, 2019

The electronic interface for quantum processors.
Microprocess. Microsystems, 2019

A 30-frames/s, $252\times144$ SPAD Flash LiDAR With 1728 Dual-Clock 48.8-ps TDCs, and Pixel-Wise Integrated Histogramming.
IEEE J. Solid State Circuits, 2019

A Modular, Direct Time-of-Flight Depth Sensor in 45/65-nm 3-D-Stacked CMOS Technology.
IEEE J. Solid State Circuits, 2019

SPINE (SPIN Emulator) - A Quantum-Electronics Interface Simulator.
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019

The role of cryo-CMOS in quantum computers.
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019

Benefits and Challenges of Designing Cryogenic CMOS RF Circuits for Quantum Computers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Bit Too Much? High Speed Imaging from Sparse Photon Counts.
Proceedings of the IEEE International Conference on Computational Photography, 2019

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

Cryo-CMOS Electronics for Quantum Computing Applications.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

Voltage References for the Ultra-Wide Temperature Range from 4.2K to 300K in 40-nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

Time Domain NIRS Optode based on Null/Small Source-Detector Distance for Wearable Applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
A CMOS SPAD Imager with Collision Detection and 128 Dynamically Reallocating TDCs for Single-Photon Counting and 3D Time-of-Flight Imaging.
Sensors, 2018

Mutually Coupled Time-to-Digital Converters (TDCs) for Direct Time-of-Flight (dTOF) Image Sensors <sup>‡</sup>.
Sensors, 2018

A Hybrid Readout Solution for GaN-Based Detectors Using CMOS Technology.
Sensors, 2018

Cryo-CMOS Circuits and Systems for Quantum Computing Applications.
IEEE J. Solid State Circuits, 2018

Rethinking Secure FPGAs: Towards a Cryptography-friendly Configurable Cell Architecture and its Automated Design Flow.
IACR Cryptol. ePrint Arch., 2018

A 'Little Bit' Too Much? High Speed Imaging from Sparse Photon Counts.
CoRR, 2018

A 252 × 144 SPAD Pixel Flash Lidar with 1728 Dual-Clock 48.8 PS TDCs, Integrated Histogramming and 14.9-to-1 Compression in 180NM CMOS Technology.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Multipurpose, Fully-Integrated 128×128 Event-Driven MD-SiPM with 512 16-Bit TDCs with 45 PS LSB and 20 NS Gating.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 256×256 45/65nm 3D-stacked SPAD-based direct TOF image sensor for LiDAR applications with optical polar modulation for up to 18.6dB interference suppression.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Session 30 overview: Emerging memories: Memory and technology directions subcommittees.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

3D-Stacked CMOS SPAD Image Sensors: Technology and Applications.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Characterization and Model Validation of Mismatch in Nanometer CMOS at Cryogenic Temperatures.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

Towards a scalable quantum computer.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

A co-design methodology for scalable quantum processors and their classical electronic interface.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
A quantum-implementable neural network model.
Quantum Inf. Process., 2017

Cryogenic CMOS interfaces for quantum devices.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017

15.5 Cryo-CMOS circuits and systems for scalable quantum computing.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

EE3: Quantum engineering: Hype, spin or reality?
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

From the Quantum Moore's Law toward Silicon Based Universal Quantum Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures.
Proceedings of the International Conference on Field Programmable Technology, 2017

Nanometer CMOS characterization and compact modeling at deep-cryogenic temperatures.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

Cryo-CMOS Electronic Control for Scalable Quantum Computing: Invited.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Single Photon Counting UV Solar-Blind Detectors Using Silicon and III-Nitride Materials.
Sensors, 2016

Photon-Counting Arrays for Time-Resolved Imaging.
Sensors, 2016

A 1 GSa/s, Reconfigurable Soft-core FPGA ADC (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

CryoCMOS hardware technology a classical infrastructure for a scalable quantum computer.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

A heterogeneous quantum computer architecture.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015
A 1 × 400 Backside-Illuminated SPAD Sensor With 49.7 ps Resolution, 30 pJ/Sample TDCs Fabricated in 3D CMOS Technology for Near-Infrared Optical Tomography.
IEEE J. Solid State Circuits, 2015

Large format single-photon and multi-photon imaging.
Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015

11.4 A 67, 392-SPAD PVTB-compensated multi-channel digital SiPM with 432 column-parallel 48ps 17b TDCs for endoscopic time-of-flight PET.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

200 MS/s ADC implemented in a FPGA employing TDCs.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

2014
Way Stealing: A Unified Data Cache and Architecturally Visible Storage for Instruction Set Extensions.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage.
ACM Trans. Archit. Code Optim., 2014

A 1024 × 8, 700-ps Time-Gated SPAD Line Sensor for Planetary Surface Exploration With Laser Raman Spectroscopy and LIBS.
IEEE J. Solid State Circuits, 2014

SPADs for quantum random number generators and beyond.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
Toward One Giga Frames per Second - Evolution of <i>in Situ</i> Storage Image Sensors.
Sensors, 2013

A 1024×8 700ps time-gated SPAD line sensor for laser raman spectroscopy and LIBS in space and rover-based planetary exploration.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Single-photon image sensors.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

A Time-Resolved, Low-Noise Single-Photon Image Sensor Fabricated in Deep-Submicron CMOS Technology.
IEEE J. Solid State Circuits, 2012

Counting stream registers: An efficient and effective snoop filter architecture.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Low power time-of-flight 3D imager system in standard CMOS.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

A fully-integrated 780×800μm<sup>2</sup> multi-digital silicon photomultiplier with column-parallel time-to-digital converter.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
Hybrid Small Animal Imaging System Combining Magnetic Resonance Imaging With Fluorescence Tomography Using Single Photon Avalanche Diode Detectors.
IEEE Trans. Medical Imaging, 2011

An Implementation of a Spike-Response Model With Escape Noise Using an Avalanche Diode.
IEEE Trans. Biomed. Circuits Syst., 2011

A 160×128 single-photon image sensor with on-pixel 55ps 10b time-to-digital converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 128-channel, 9ps column-parallel two-stage TDC based on time difference amplification for time-resolved imaging.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
Poisson distributed noise generation for spiking neural applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions.
Proceedings of the High Performance Embedded Architectures and Compilers, 2010

On pixel detection threshold in the gigavision camera.
Proceedings of the Digital Photography VI, 2010

2009
Single-Photon Synchronous Detection.
IEEE J. Solid State Circuits, 2009

Highly Sensitive Arrays of Nano-sized Single-Photon Avalanche Diodes for Industrial and Bio Imaging.
Proceedings of the Nano-Net - 4th International ICST Conference, 2009

A gamma, x-ray and high energy proton radiation-tolerant CIS for space applications.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Image reconstruction in the gigavision camera.
Proceedings of the 12th IEEE International Conference on Computer Vision Workshops, 2009

The gigavision camera.
Proceedings of the IEEE International Conference on Acoustics, 2009

MPSoC Design Using Application-Specific Architecturally Visible Communication.
Proceedings of the High Performance Embedded Architectures and Compilers, 2009

A 17ps time-to-digital converter implemented in 65nm FPGA technology.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

A 32x32-pixel array with in-pixel photon counting and arrival time measurement in the analog domain.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

A parallel 32×32 time-to-digital converter array fabricated in a 130 nm imaging CMOS technology.
Proceedings of the 35th European Solid-State Circuits Conference, 2009

Way Stealing: cache-assisted automatic instruction set extensions.
Proceedings of the 46th Design Automation Conference, 2009

A 32×32 50ps resolution 10 bit time to digital converter array in 130nm CMOS for time correlated imaging.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A Single-Photon Avalanche Diode Array for Fluorescence Lifetime Imaging Microscopy.
IEEE J. Solid State Circuits, 2008

A 128 × 128 Single-Photon Image Sensor With Column-Level 10-Bit Time-to-Digital Converter Array.
IEEE J. Solid State Circuits, 2008

Introduction to the Special Issue on the 33rd European Solid-State Circuits Conference (ESSCIRC 2007).
IEEE J. Solid State Circuits, 2008

A Microsystem for Time-Resolved Fluorescence Analysis using CMOS Single-Photon Avalanche Diodes and Micro-LEDs.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 128×128 Single-Photon Imager with on-Chip Column-Level 10b Time-to-Digital Converter Array Capable of 97ps Resolution.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Techniques for fully integrated intra-/inter-chip optical communication.
Proceedings of the 45th Design Automation Conference, 2008

Speculative DMA for architecturally visible storage in instruction set extensions.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

2007
3D Hand Model Fitting for Virtual Keyboard System.
Proceedings of the 8th IEEE Workshop on Applications of Computer Vision (WACV 2007), 2007

A 128×2 CMOS Single-Photon Streak Camera with Timing-Preserving Latchless Pipeline Readout.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
Oversampled Time Estimation Techniques for Precision Photonic Detectors.
Proceedings of the IFIP VLSI-SoC 2006, 2006

A single photon avalanche diode array fabricated in deep-submicron CMOS technology.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Feature-based techniques for real-time morphable model facial image analysis.
Proceedings of the Electronic Imaging: Image and Video Communications and Processing 2005, 2005

Future wireless systems.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A Virtual Keyboard Based on True-3D Optical Ranging.
Proceedings of the British Machine Vision Conference 2005, Oxford, UK, September 2005, 2005

2004
Substrate Coupling: Modeling, Simulation and Design Perspectives.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

A CMOS 3D camera with millimetric depth resolution.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002
Watermarking Techniques for Electronic Circuit Design.
Proceedings of the Digital Watermarking, First International Workshop, 2002

2001
Modeling of Substrate Noise Injected by Digital Libraries.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

2000
Guest Editorial.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

A benchmark suite for substrate analysis.
Proceedings of ASP-DAC 2000, 2000

1999
Modeling digital substrate noise injection in mixed-signal IC's.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Substrate optimization based on semi-analytical techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Substrate Noise: Analysis, Models, and Optimization.
Proceedings of the VLSI: Systems on a Chip, 1999

Copyright protection of designs based on multi source IPs.
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

Watermarking Layout Topologies.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999

1998
General AC Constraint Transformation for Analog ICs.
Proceedings of the 35th Conference on Design Automation, 1998

1996
Automation of IC layout with analog constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

A video driver system designed using a top-down, constraint-driven methodology.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Generalized constraint generation in the presence of non-deterministic parasitics.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Semi-analytical techniques for substrate characterization in the design of mixed-signal ICs.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Use of Sensitivities and Generalized Substrate Models in Mixed-Signal IC Design.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Symbolic compaction with analogue constraints.
Int. J. Circuit Theory Appl., 1995

1994
Simultaneous Placement and Module Optimization of Analog IC's.
Proceedings of the 31st Conference on Design Automation, 1994

1993
Generalized constraint generation for analog circuit design.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1992
An efficient methodology for symbolic compaction of analog IC's with multiple symmetry constraints.
Proceedings of the conference on European design automation, 1992


  Loading...