Siwan Dong

According to our database, Siwan Dong authored at least 19 papers between 2015 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

An 8-Bit 160-MS/s Charge Injection SAR ADC With Build-in Offset Calibration for Computing-in-Memory Macros.

Siwan Dong, Jingyu Wang

IEEE Trans. Circuits Syst. II Express Briefs, March, 2026

A 32Gb/s 0.63ps jitter half-rate CDR with ultra-fine interval multi-phase clock sampling and dual-path feedback DCO.

Siwan Dong, Shenzhu Wu, Xiaoliang Ji, Jinfu Wang, Xiaohui Li, Junwei Zhu

Microelectron. J., 2026

2025

A small area-occupation three-stage OTA with transistor resistance and parasitic capacitance Q-factor modulation for miniaturized communication systems.

Yangtao Hu, Siwan Dong, Xiaoliang Ji, Zengwei Qi, Cheng Shan

Microelectron. J., 2025

2024

A 0.6V 119 dB High-CMRR Low-NEF PGA with common-mode voltage control for ECG recording.

Siwan Dong, Ruoyu Zhang, Chuqiang Jing, Menghan Yuan

Microelectron. J., 2024

An 11.36-Bit 405 μW SAR-VCO ADC with single-path differential VCO-based quantizer in 65 nm CMOS.

Siwan Dong, Menghan Yuan, Sihao Ning

Microelectron. J., 2024

2023

A Bi/Tri-level Self-Adaptive Two-Step DAC Switching Scheme for High-Power Efficiency SAR-Based ADCs.

Siwan Dong, Changxiang Liu, Sen Bu, Jiaqi Li

Circuits Syst. Signal Process., August, 2023

A 0.6-1.8 V/0.4-1.6 V Input/Output LDO with High PSRR over 50 dB/30 dB in Dual-Modes.

Siwan Dong, Sen Bu, Xingyuan Tong

Circuits Syst. Signal Process., 2023

A sharpened reconfigurable CIC filter for multi-channel human-computer interaction data sampling.

Siwan Dong, Peng Wang, Sihao Ning, Wenju Yang

Proceedings of the 6th International Conference on Artificial Intelligence and Pattern Recognition, 2023

2022

A 0.6-V 12-bit 13.2-fJ/conversion-step SAR ADC with time-domain VCDL-based comparator and metastability immunity technique.

Xingyuan Tong, Wei Jin, Chunming Zhang, Xin Xin, Siwan Dong, Qinqin Li

Microelectron. J., 2022

A 0.6-V, 1.56-nW, 5.87-ppm/°C, 0.23%/V CMOS-Only Subthreshold Voltage Reference with the Threshold Voltage Difference.

Xin Xin, Yuanhao Hu, Jueping Cai, Siwan Dong, Xingyuan Tong

Circuits Syst. Signal Process., 2022

2021

A chaos-based true random number generator based on OTA sharing and non-flipped folded Bernoulli mapping for high-precision ADC calibration.

Siwan Dong, Yarong Wang, Xin Xin, Xingyuan Tong

Microelectron. J., 2021

A three-stage OTA with hybrid active miller enhanced compensation technique for large to heavy load applications.

Siwan Dong, Cong Liu, Xin Xin, Xingyuan Tong

Microelectron. J., 2021

A 0.3-V 8.72-nW OTA with Bulk-Driven Low-Impedance Compensation for Ultra-Low Power Applications.

Siwan Dong, Yu Wang, Xingyuan Tong, Yarong Wang, Cong Liu

Circuits Syst. Signal Process., 2021

2020

A 17.6-nW 35.7-ppm/°C Temperature Coefficient All-SVT-MOSFET Subthreshold Voltage Reference in Standard 0.18-μm N-Well CMOS.

Xingyuan Tong, Andi Yang, Siwan Dong

IEEE Access, 2020

2019

A 10-Bit 120 kS/s SAR ADC Without Reset Energy for Biomedical Electronics.

Xingyuan Tong, Mengdi Song, Yawen Chen, Siwan Dong

Circuits Syst. Signal Process., 2019

2018

Proactive correction coset decoding scheme based on SEC-DED code for multibit asymmetric errors in STT-MRAM.

Liwen Liu, Yiqi Zhuang, Li Zhang, Hualian Tang, Siwan Dong

Microelectron. J., 2018

A transconductance-enhancement cascode Miller compensation for low-power multistage amplifiers.

Siwan Dong, Zhangming Zhu

Microelectron. J., 2018

2015

A low-jitter wide-range duty cycle corrector for high-speed high-precision ADC.

Minjie Liu, Yingzi Jiang, Siwan Dong, Zhangming Zhu, Yintang Yang

Microelectron. J., 2015

A High Linear CMOS Body Effect Compensation Bootstrapped Switch.

Siwan Dong, Minjie Liu, Zhangming Zhu, Yintang Yang

J. Circuits Syst. Comput., 2015