Yintang Yang

According to our database1, Yintang Yang authored at least 229 papers between 2004 and 2021.

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Bibliography

2021
Cloud-based RFID mutual authentication scheme for efficient privacy preserving in IoV.
J. Frankl. Inst., 2021

2020
A Secure and Verifiable Data Sharing Scheme Based on Blockchain in Vehicular Social Networks.
IEEE Trans. Veh. Technol., 2020

Ultrawideband Power-Switchable Transmitter With 17.7-dBm Output Power for See-Through-Wall Radar.
IEEE Trans. Very Large Scale Integr. Syst., 2020

SRNoC: An Ultra-Fast Configurable FPGA-Based NoC Simulator Using Switch-Router Architecture.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

High Resolution ADC for Ultrasound Color Doppler Imaging Based on MASH Sigma-Delta Modulator.
IEEE Trans. Biomed. Eng., 2020

A dynamic and verifiable multi-keyword ranked search scheme in the P2P networking environment.
Peer Peer Netw. Appl., 2020

Physics based scalable inductance model for three-dimensional solenoid inductors.
Microelectron. J., 2020

A 7-bit 900-MS/s 2-Then-3-bit/cycle SAR ADC With Background Offset Calibration.
IEEE J. Solid State Circuits, 2020

A secure and efficient outsourced computation on data sharing scheme for privacy computing.
J. Parallel Distributed Comput., 2020

A 20-MHz BW MASH Sigma-Delta Modulator with Mismatch Noise Randomization for Multi-Bit DACs.
J. Circuits Syst. Comput., 2020

Cloud-based lightweight secure RFID mutual authentication protocol in IoT.
Inf. Sci., 2020

Network-on-chip heuristic mapping algorithm based on isomorphism elimination for NoC optimisation.
IET Comput. Digit. Tech., 2020

An optimized fully-passive noise-shaping SAR ADC with integration capacitor reuse technique.
IEICE Electron. Express, 2020

A high-linearity capacitance-to-digital converter with capacitive offset cancellation technique.
IEICE Electron. Express, 2020

An IAOT controlled current-mode buck converter with RC-based inductor current sensor.
IEICE Electronic Express, 2020

A Collaborative Auditing Blockchain for Trustworthy Data Integrity in Cloud Storage System.
IEEE Access, 2020

2019
TAONoC: A Regular Passive Optical Network-on-Chip Architecture Based on Comb Switches.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A 4.6-ppm/°C High-Order Curvature Compensated Bandgap Reference for BMIC.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A 1.2-V 2.41-GHz Three-Stage CMOS OTA With Efficient Frequency Compensation Technique.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A 10-Bit 600-MS/s Time-Interleaved SAR ADC With Interpolation-Based Timing Skew Calibration.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Thermal-Aware Modeling and Analysis for a Power Distribution Network Including Through-Silicon-Vias in 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Permutation Matrix Encryption Based Ultralightweight Secure RFID Scheme in Internet of Vehicles.
Sensors, 2019

SMONoC: Optical network-on-chip using a statistical multiplexing strategy.
Opt. Switch. Netw., 2019

A Lightweight Authentication Scheme for Cloud-Based RFID Healthcare Systems.
IEEE Netw., 2019

Electromagnetic modeling and analysis of the tapered differential through glass vias.
Microelectron. J., 2019

Broadband inductance modeling of TXVs for 3D interconnection.
Microelectron. J., 2019

A high linear voltage-to-time converter (VTC) with 1.2 V input range for time-domain analog-to-digital converters.
Microelectron. J., 2019

A 6-bit digital CMOS variable gain attenuator with large dynamic range and high linearity-in-dB for ultrasound imaging applications.
Microelectron. J., 2019

A 15ps resolution time-to-digital converter with on-chip PLL counting for LiDAR multi-object sensors.
Microelectron. J., 2019

Mismatch errors randomization for multi-bit DAC in sigma-delta modulators based on butterfly-type network.
Microelectron. J., 2019

A Low Complexity Digital Foreground Calibration Technique for CMOS Pipelined ADCs.
J. Circuits Syst. Comput., 2019

Blockchain-Based Secure Time Protection Scheme in IoT.
IEEE Internet Things J., 2019

A 15-MHz bandwidth double sampling MASH25b-15b sigma-delta modulator with DEM for multibit DACs.
Int. J. Circuit Theory Appl., 2019

A large dynamic range voltage controlled attenuator with improved linearity-in-dB for ultrasound applications.
Int. J. Circuit Theory Appl., 2019

Layout optimization methodology for ring-based on-chip optical network.
IEICE Electron. Express, 2019

Light-load efficiency improving boost converter with the hybrid modulation of hysteresis current mode and burst mode.
IEICE Electron. Express, 2019

Upset and damage mechanisms of the three-dimensional silicon device induced by high power microwave interference.
IEICE Electron. Express, 2019

Efficient and privacy preserving access control scheme for fog-enabled IoT.
Future Gener. Comput. Syst., 2019

A blockchain-based clock synchronization Scheme in IoT.
Future Gener. Comput. Syst., 2019

An Efficient Multi-Message and Multi-Receiver Signcryption Scheme for Heterogeneous Smart Mobile IoT.
IEEE Access, 2019

Spatiotemporal Adaptive Nonuniformity Correction Based on BTV Regularization.
IEEE Access, 2019

A Secure Cross-Domain Access Control Scheme in Social Networks.
Proceedings of the 2019 IEEE International Conference on Communications, 2019

A 7b 2.6mW 900MS/s Nonbinary 2-then-3b/cycle SAR ADC with Background Offset Calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
H<sup>2</sup>OEIN: A Hierarchical Hybrid Optical/Electrical Interconnection Network for Exascale Computing Systems.
IEEE Trans. Multi Scale Comput. Syst., 2018

A joint optimization method for NoC topology generation.
J. Supercomput., 2018

Lightweight RFID Protocol for Medical Privacy Protection in IoT.
IEEE Trans. Ind. Informatics, 2018

A Reconfigurable 10-to-12-b 80-to-20-MS/s Bandwidth Scalable SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A 1.4-mW 10-Bit 150-MS/s SAR ADC With Nonbinary Split Capacitive DAC in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

EARS-DM: Efficient Auto Correction Retrieval Scheme for Data Management in Edge Computing.
Sensors, 2018

Secure, efficient and revocable data sharing scheme for vehicular fogs.
Peer Peer Netw. Appl., 2018

Secure ultra-lightweight RFID mutual authentication protocol based on transparent computing for IoV.
Peer Peer Netw. Appl., 2018

Secure and private key management scheme in big data networking.
Peer Peer Netw. Appl., 2018

Secure and Efficient Privacy-Preserving Ciphertext Retrieval in Connected Vehicular Cloud Computing.
IEEE Netw., 2018

Low power and reliable interconnection with combination of Crosstalk Avoidance Green Coding and capacitively charge-sharing transmitter for network-on-chip.
Microelectron. J., 2018

A 1.2 V, 3.0 ppm/°C, 3.6 μA CMOS bandgap reference with novel 3-order curvature compensation.
Microelectron. J., 2018

A dual mode step-down switched-capacitor DC-DC converter with adaptive switch width modulation.
Microelectron. J., 2018

MedBlock: Efficient and Secure Medical Data Sharing Via Blockchain.
J. Medical Syst., 2018

A Power-Enhanced Active Rectifier with Offset-Controlled Comparator for Self-Powered PEH Systems.
J. Circuits Syst. Comput., 2018

Adaptive On-Time-Controlled PFM Boost Converter with a Below-Threshold Startup Voltage.
J. Circuits Syst. Comput., 2018

Unified multi-objective mapping for network-on-chip using genetic-based hyper-heuristic algorithms.
IET Comput. Digit. Tech., 2018

Effectiveness of the layout approach in mitigating single event transients in 65-nm bulk CMOS process.
IEICE Electron. Express, 2018

An intelligent partitioning approach of the system-on-chip for flexible and stretchable systems.
Sci. China Inf. Sci., 2018

Analysis of delay from step response based on stretchable flexible interconnects.
Sci. China Inf. Sci., 2018

A stretchable flexible electronic platform for mechanical and electrical collaborative design.
Sci. China Inf. Sci., 2018

A Thermal-Aware Power Allocation Method for Optical Network-on-Chip.
IEEE Access, 2018

A Multi-Objective Architecture Optimization Method for Application-Specific Noc Design.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

Secure Time Synchronization Scheme in IoT Based on Blockchain.
Proceedings of the IEEE International Conference on Internet of Things (iThings) and IEEE Green Computing and Communications (GreenCom) and IEEE Cyber, 2018

Cross-Domain Based Data Sharing Scheme in Cooperative Edge Computing.
Proceedings of the 2018 IEEE International Conference on Edge Computing, 2018

Inductance of Different Profiles of Through Glass Vias based on magnetic flux density.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

A Background Timing Skew Calibration Technique in Time-Interleaved ADCs With Second Order Compensation.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
A 58-ppm/°C 40-nW BGR at Supply From 0.5 V for Energy Harvesting IoT Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A Secure and Verifiable Outsourced Access Control Scheme in Fog-Cloud Computing.
Sensors, 2017

NFC Secure Payment and Verification Scheme with CS E-Ticket.
Secur. Commun. Networks, 2017

Proxy-assisted access control scheme of cloud data for smart cities.
Pers. Ubiquitous Comput., 2017

An ultra-lightweight RFID authentication scheme for mobile commerce.
Peer Peer Netw. Appl., 2017

System-level modeling and performance evaluation of multistage optical network on chips (MONoCs).
Photonic Netw. Commun., 2017

An active dry electrode ecg interface circuit for wearable sensors.
Microelectron. J., 2017

Universal closed-form expression based on magnetic flux density for the inductance of Tapered Through-Silicon Vias (T-TSVs).
Microelectron. J., 2017

A fair arbitration for Network-on-Chip routing with odd-even turn model.
Microelectron. J., 2017

A current-reuse dual-channel bio-signal amplifier for WBAN nodes.
Microelectron. J., 2017

A high accuracy CMOS subthreshold voltage reference with offset cancellation and thermal compensation.
Microelectron. J., 2017

ULMAP: Ultralightweight NFC Mutual Authentication Protocol with Pseudonyms in the Tag for IoT in 5G.
Mob. Inf. Syst., 2017

3D network-on-chip design for embedded ubiquitous computing systems.
J. Syst. Archit., 2017

A Near-Threshold Voltage Startup Monolithic Boost Converter with Adaptive Sleeping Time Control.
J. Circuits Syst. Comput., 2017

A Novel Interface Circuit with 99.2% MPPT Accuracy and 1.3% THD for Energy Harvesting.
J. Circuits Syst. Comput., 2017

An efficient energy and thermal-aware mapping for regular network-on-chip.
IEICE Electron. Express, 2017

A novel SEU hardened SRAM bit-cell design.
IEICE Electron. Express, 2017

A Study of PN Junction Diffusion Capacitance of MOSFET in Presence of Single Event Transient.
J. Electron. Test., 2017

CDS Circuit with High-Performance VGA Functionality and Its Design Procedure.
Circuits Syst. Signal Process., 2017

A Fast-Settling Three-Stage Amplifier Using Regular Miller Plus Reversed Indirect Compensation.
Circuits Syst. Signal Process., 2017

Multi-Keyword Fuzzy and Sortable Ciphertext Retrieval Scheme for Big Data.
Proceedings of the 2017 IEEE Global Communications Conference, 2017

Cloud-Based Lightweight RFID Mutual Authentication Protocol.
Proceedings of the Second IEEE International Conference on Data Science in Cyberspace, 2017

U2F based secure mutual authentication protocol for mobile payment.
Proceedings of the ACM Turing 50th Celebration Conference, 2017

2016
A Highly Scalable Optical Network-on-Chip With Small Network Diameter and Deadlock Freedom.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Lightweight and ultralightweight RFID mutual authentication protocol with cache in the reader for IoT in 5G.
Secur. Commun. Networks, 2016

A 3D multilayer optical network on chip based on mesh topology.
Photonic Netw. Commun., 2016

Ku band damage characteristics of GaAs pHEMT induced by a front-door coupling microwave pulse.
Microelectron. Reliab., 2016

A low-distortion CMOS analogue voltage follower for high-speed ADCs.
Microelectron. J., 2016

Design of a fully integrated receiver analog baseband chain for 2.4-GHz ZigBee applications.
Microelectron. J., 2016

Analysis of propagation delay and repeater insertion in single-walled carbon nanotube bundle interconnects.
Microelectron. J., 2016

A background fast convergence algorithm for timing skew in time-interleaved ADCs.
Microelectron. J., 2016

DRTL: A heat-balanced deadlock-free routing algorithm for 3D topology network-on-chip.
Microprocess. Microsystems, 2016

Antenna-in-package system integrated with meander line antenna based on LTCC technology.
Frontiers Inf. Technol. Electron. Eng., 2016

A 10-GS/s 6-Bit Track-and-Hold Amplifier for Time-Interleaved SAR ADCs in 65-nm CMOS.
J. Circuits Syst. Comput., 2016

A High Efficiency Self-Powered Rectifier for Piezoelectric Energy Harvesting Systems.
J. Circuits Syst. Comput., 2016

A Power-Efficient Compact Pipelined ADC for ZigBee Receiver Applications.
J. Circuits Syst. Comput., 2016

A Dual Band RF Energy Harvester with Hybrid Threshold Voltage Self-Compensation.
J. Circuits Syst. Comput., 2016

A large dynamic-range, high dB-linearity VGA using switch arrays and second-order mismatch-shaping DEM technique.
Int. J. Circuit Theory Appl., 2016

A Secure RFID Application Revocation Scheme for IoT.
IEICE Trans. Inf. Syst., 2016

An area-efficient and high speed multiplexer for battery monitor system.
IEICE Electron. Express, 2016

New coaxial through silicon via (TSV) applied for three dimensional integrated circuits (3D ICs).
IEICE Electron. Express, 2016

Universal method for designing non-blocking multicast-supported on chip optical router.
IEICE Electron. Express, 2016

Universal closed-form expressions for the inductance of tapered through silicon vias (T-TSVs) based on vector magnetic potential.
IEICE Electron. Express, 2016

An IM2-free floating current buffer using average power based automatic calibration for IEEE 802.15.6 transmitter.
IEICE Electron. Express, 2016

Panzer: A 6 × 6 photonic router for optical network on chip.
IEICE Electron. Express, 2016

RingCube - An incrementally scale-out optical interconnect for cloud computing data center.
Future Gener. Comput. Syst., 2016

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process.
Circuits Syst. Signal Process., 2016

An adaptive partition-based multicast routing scheme for mesh-based Networks-on-Chip.
Comput. Electr. Eng., 2016

NFC Secure Payment and Verification Scheme for Mobile Payment.
Proceedings of the Wireless Algorithms, Systems, and Applications, 2016

Privacy protection based access control scheme in cloud-based services.
Proceedings of the 2016 IEEE/CIC International Conference on Communications in China, 2016

Cloud-Based Lightweight RFID Healthcare Privacy Protection Protocol.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

A 0.5 V, 40nW voltage reference for WBAN devices.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
A High-SFDR 14-bit 500 MS/s Current-Steering D/A Converter in 0.18~µm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2015

A 0.45-V, 14.6-nW CMOS Subthreshold Voltage Reference With No Resistors and No BJTs.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Analysis of high power microwave induced degradation and damage effects in AlGaAs/InGaAs pHEMTs.
Microelectron. Reliab., 2015

A low-jitter wide-range duty cycle corrector for high-speed high-precision ADC.
Microelectron. J., 2015

A 5-GHz LC VCO with digital AAC and AFBS for 2.4 GHz ZigBee transceiver applications.
Microelectron. J., 2015

A low-distortion multi-bit sigma-delta ADC with mismatch-shaping DACs for WLAN applications.
Microelectron. J., 2015

A background digital calibration of split-capacitor 16-bit SAR ADC with sub-binary architecture.
Microelectron. J., 2015

A Multi-Output on-Chip Switched-Capacitor DC-DC Converter with Unequal Flying Capacitors for Different Power Modes.
J. Circuits Syst. Comput., 2015

A 20-mV Input DC/DC Converter for Energy Harvesting Applications.
J. Circuits Syst. Comput., 2015

Analog-Based CMOS Duty Cycle Corrector with 50-800 MHz Operating Range.
J. Circuits Syst. Comput., 2015

An 8-Bit 0.333-2 GS/s Configurable Time-Interleaved SAR ADC in 65-nm CMOS.
J. Circuits Syst. Comput., 2015

Feed-Forward Slope Compensated PFC for Chaos Control.
J. Circuits Syst. Comput., 2015

A High Linear CMOS Body Effect Compensation Bootstrapped Switch.
J. Circuits Syst. Comput., 2015

Adaptive Sensing Private Property Protection Protocol Based on Cloud.
Int. J. Distributed Sens. Networks, 2015

Electrical analysis of TSV step change in radius with compensation structure.
IEICE Electron. Express, 2015

Analysis and evaluation of coupling between adjacent TSVs with considering the discharging path.
IEICE Electron. Express, 2015

Variable resolution SAR ADC architecture with 99.6% reduction in switching energy over conventional scheme.
IEICE Electron. Express, 2015

Effects of coaxial through-silicon via on carrier mobility along [100] and [110] crystal directions of (100) silicon.
IEICE Electron. Express, 2015

Green phase difference coding with low switching activity for Network-on-Chip.
IEICE Electron. Express, 2015

An ultra-low-voltage self-powered energy harvesting rectifier with digital switch control.
IEICE Electron. Express, 2015

Modeling and understanding of the frequency dependent HPM upset susceptibility of the CMOS inverter.
Sci. China Inf. Sci., 2015

ULRAS: Ultra-Lightweight RFID Authentication Scheme for Mobile Device.
Proceedings of the Wireless Algorithms, Systems, and Applications, 2015

RFID Secure Application Revocation for IoT in 5G.
Proceedings of the 2015 IEEE TrustCom/BigDataSE/ISPA, 2015

Ciphertext Retrieval in Super-Peer P2P Network.
Proceedings of the 2015 IEEE Global Communications Conference, 2015

Secure and Efficient Personal Health Record Scheme Using Attribute-Based Encryption.
Proceedings of the IEEE 2nd International Conference on Cyber Security and Cloud Computing, 2015

A 0.45 V, 15.6 nW MOSFET-only sub-threshold voltage reference with no amplifiers.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

A voltage doubling AC-DC converter with offset-controlled comparators for piezoelectric energy harvester.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
Novel Universal Multistable Mechanism Based on Magnetic-Mechanical-Inertial Coupling Effects.
IEEE Trans. Ind. Electron., 2014

A 19-nW 0.7-V CMOS Voltage Reference With No Amplifiers and No Clock Circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 2.1-Channel Class-D Amplifier Exploited Coupling Virtual-Audio-Image to Enhance Stereo.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A single-channel 8-bit 660 MS/s asynchronous SAR ADC with pre-settling procedure in 65 nm CMOS.
Microelectron. J., 2014

QBNoC: QoS-aware bufferless NoC architecture.
Microelectron. J., 2014

Capacitance characterization of tapered through-silicon-via considering MOS effect.
Microelectron. J., 2014

A fully integrated feedback AGC loop for ZigBee (IEEE 802.15.4) RF transceiver applications.
Microelectron. J., 2014

A Very Low-TC Second-Order temperature-compensated CMOS Current Reference.
J. Circuits Syst. Comput., 2014

Design of a Fully Integrated 2.4 GHz frequency PLL synthesizer for ZigBee Transceiver Application.
J. Circuits Syst. Comput., 2014

A 2.67 fJ/c.-s. 27.8 kS/s 0.35 V 10-bit successive approximation register analogue-to-digital converter in 65 nm complementary metal oxide semiconductor.
IET Circuits Devices Syst., 2014

RONoC: A Reconfigurable Architecture for Application-Specific Optical Network-on-Chip.
IEICE Trans. Inf. Syst., 2014

Modeling and optimization of noise coupling in TSV-based 3D ICs.
IEICE Electron. Express, 2014

Temperature properties of the parasitic resistance of through-silicon vias (TSVs) in high-frequency 3-D ICs.
IEICE Electron. Express, 2014

On the design of a 3D optical interconnected memory system.
IEICE Electron. Express, 2014

H-cluster: a hybrid architecture for three-dimensional many-core chips.
IEICE Electron. Express, 2014

CCS: A low-power capacitively charge-sharing transmitter for NoC links.
IEICE Electron. Express, 2014

A 3D topology based-on partial overlapped clusters for NoC.
IEICE Electron. Express, 2014

RSEL: revocable secure efficient lightweight RFID authentication scheme.
Concurr. Comput. Pract. Exp., 2014

A Power Efficient and Compact Optical Interconnect for Network-on-Chip.
IEEE Comput. Archit. Lett., 2014

A multi-output on-chip switched-capacitor DC-DC converter for near- and sub-threshold power modes.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A novel hybrid two-stage IM2 cancelling technique for IEEE 802.15.6 HBC standard.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2014

LRMAPC: A Lightweight RFID Mutual Authentication Protocol with Cache in the Reader for IoT.
Proceedings of the 14th IEEE International Conference on Computer and Information Technology, 2014

2013
A 1.33 μW 10-bit 200KS/s SAR ADC with a tri-level based capacitor switching procedure.
Microelectron. J., 2013

Two-dimensional electrical modeling of thermoelectric devices considering temperature-dependent parameters under the condition of nonuniform substrate temperature distribution.
Microelectron. J., 2013

An energy- and buffer-aware fully adaptive routing algorithm for Network-on-Chip.
Microelectron. J., 2013

A Low Distortion Bootstrapped Switch for 4-Bit MDAC.
J. Circuits Syst. Comput., 2013

A 3.03 μW 10-BIT 200 KS/s SAR ADC IN 0.18 μM CMOS.
J. Circuits Syst. Comput., 2013

A Low Offset High Speed Comparator for Pipeline ADC.
J. Circuits Syst. Comput., 2013

A Low Offset Comparator for High Speed Low Power ADC.
J. Circuits Syst. Comput., 2013

A High Speed Low Power latched Comparator for SHA-Less Pipelined ADC.
J. Circuits Syst. Comput., 2013

Energy- and Traffic-Balance-Aware Mapping Algorithm for Network-on-Chip.
IEICE Trans. Inf. Syst., 2013

A CMOS OTA with extremely large DC open-loop voltage gain.
IEICE Electron. Express, 2013

A bufferless optical network-on-chip router.
IEICE Electron. Express, 2013

A highly efficient interface circuit for ultra-low-voltage energy harvesting.
IEICE Electron. Express, 2013

Thermo-mechanical performance of Cu and SiO<sub>2</sub> filled coaxial through-silicon-via (TSV).
IEICE Electron. Express, 2013

Analytical models for the thermal strain and stress induced by annular through-silicon-via (TSV).
IEICE Electron. Express, 2013

Reduction of signal reflection in high-frequency three-dimensional (3D) integration circuits.
IEICE Electron. Express, 2013

A low-jitter pulsewidth control loop with high supply noise rejection.
IEICE Electron. Express, 2013

3D Networks-on-Chip mapping targeting minimum signal TSVs.
IEICE Electron. Express, 2013

A hybrid packet-circuit switched router for optical network on chip.
Comput. Electr. Eng., 2013

An Adaptive Feedback Load Balancing Algorithm in HDFS.
Proceedings of the 2013 5th International Conference on Intelligent Networking and Collaborative Systems, 2013

2012
Through-silicon-via insertion for performance optimization in three-dimensional integrated circuits.
Microelectron. J., 2012

Target Tracking Approximation Algorithms with Particle Filter Optimization and Fault-Tolerant Analysis in Wireless Sensor Networks.
J. Networks, 2012

A High Precision CMOS voltage Reference without resistors.
J. Circuits Syst. Comput., 2012

Thermal and competition aware mapping for 3D network-on-chip.
IEICE Electron. Express, 2012

A multi-wavelength communication strategy for 2D-mesh Network-on-Chip.
IEICE Electron. Express, 2012

A fast-locking low-jitter pulsewidth control loop for high-speed pipelined ADC.
IEICE Electron. Express, 2012

Cluster mesh: a topology for three-dimensional network-on-chip.
IEICE Electron. Express, 2012

A CMOS 4.6ppm/°C curvature-compensated bandgap voltage reference.
IEICE Electron. Express, 2012

A crosstalk aware routing algorithm for Benes ONoC.
IEICE Electron. Express, 2012

Breakdown voltage analysis for the new RESURF AlGaN/GaN HEMTs.
Sci. China Inf. Sci., 2012

DTBR: A dynamic thermal-balance routing algorithm for Network-on-Chip.
Comput. Electr. Eng., 2012

ESLRAS: A Lightweight RFID Authentication Scheme with High Efficiency and Strong Security for Internet of Things.
Proceedings of the 2012 Fourth International Conference on Intelligent Networking and Collaborative Systems, 2012

Smart-blocking file storage method in cloud computing.
Proceedings of the 2012 1st IEEE International Conference on Communications in China (ICCC), 2012

2011
Novel hybrid D/A structures for high-resolution SAR ADCs - analysis, modeling and realization.
Microelectron. J., 2011

An improved distributed routing algorithm for Benes based optical NoC
CoRR, 2011

Strain coefficient measurement for the (100) uniaxial strain silicon by Raman spectroscopy.
Sci. China Inf. Sci., 2011

An Efficient Bee Behavior-Based Multi-function Routing Algorithm for Network-on-Chip.
Proceedings of the Advances in Swarm Intelligence - Second International Conference, 2011

A high-speed asynchronous array multiplier based on multi-threshold semi-static NULL convention logic pipeline.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A thermal model for the top layer of 3D integrated circuits considering through silicon vias.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

System level performance evaluation of three-dimensional integrated circuit.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A novel low THD 4-quadrant analog multiplier using feedforward compensation for PFC.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Zero-crossing distortion analysis in one cycle controlled boost PFC for Low THD.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A low-kickback preamplifier with offset cancellation for pipelined folding A/D Converter.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A 1.8V 100MS/s 10-bit pipelined folding A/D converter with 9.49 ENOB at Nyquist frequency.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
Design of a low power GPS receiver in 0.18 µm CMOS technology with a SigmaDeltafractional-N synthesizer.
J. Zhejiang Univ. Sci. C, 2010

High Speed Multi-Resource Arbiter with Active Virtual Channel Allocation for Network on Chips.
J. Circuits Syst. Comput., 2010

A 12-bit 1MS/s Non-calibrating SAR A/D Converter Based on 90nm CMOS Process.
Proceedings of the 2010 International Conference on Machine Vision and Human-machine Interface, 2010

An asynchronous low latency ordered arbiter for network on chips.
Proceedings of the Sixth International Conference on Natural Computation, 2010

Performance Analysis of Low Power Null Convention Logic Units with Power Cutoff.
Proceedings of the 2010 Asia-Pacific Conference on Wearable Computing Systems, 2010

2009
Low-power Capacitor Arrays for Charge Redistribution SAR A-D Converter in 65nm CMOS.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

A Novel R-C Combination Based Pseudo-differential SAR A/D Converter in 90nm CMOS Process.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

A Low Distortion CMOS Bootstrapped Switch.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

A GALS Delay-insensitive Self-timed Wrapper for Network on Chips.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

A Novel GALS Single-Track Protocol Asynchronous Communication Circuits.
Proceedings of the 2009 Pacific-Asia Conference on Circuits, Communications and Systems, 2009

2008
Temperature-dependent stress-induced voiding in dual-damascene Cu interconnects.
Microelectron. Reliab., 2008

2005
A High Accuracy Bandgap Reference with Chopped Modulator to Compensate MOSFET Mismatch.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Testing for Resistive Shorts in FPGA Interconnects.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

2004
Study of swing potential on deep submicron on-chip interconnect.
Microelectron. Reliab., 2004


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