Siyuan Ouyang

Orcid: 0009-0001-3270-8607

According to our database1, Siyuan Ouyang authored at least 6 papers between 2020 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 21-Transistor Single-Phase-Clocked Flip-Flop With Low Leakage Current for Near-Threshold Voltage Operation.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2026

A Pipelined NoC-Based Membrane Shortcut SNN Architecture for Low-Latency Spike Sorting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

An RRAM-based Multi-Timescale Spiking Processor with Reconfigurable Neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
SDISC: A Spike-Driven Human-Machine Interface with In-Situ Computing for Real-Time Low-Power Interaction.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
A Scalable Area-Efficient Low-Delay Asynchronous AER Circuits Design for Neuromorphic Chips.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

2020
A Study on Radar Target Detection Based on Broad Learning System.
Proceedings of the ICDSP 2020: 4th International Conference on Digital Signal Processing, 2020


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