Xumeng Zhang

Orcid: 0000-0002-3828-151X

According to our database1, Xumeng Zhang authored at least 29 papers between 2019 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 21-Transistor Single-Phase-Clocked Flip-Flop With Low Leakage Current for Near-Threshold Voltage Operation.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2026

A Sparse-Integrated Filtering Residual Spiking Neural Network for High-Accuracy Spike Sorting and Co-Optimization on Memristor Platforms.
IEEE Trans. Biomed. Circuits Syst., February, 2026

CogECI: Context Grounded Document-level Event Causality Identification via Large Language Models.
Knowl. Based Syst., 2026

A Pipelined NoC-Based Membrane Shortcut SNN Architecture for Low-Latency Spike Sorting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

An RRAM-based Multi-Timescale Spiking Processor with Reconfigurable Neurons.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

An RRAM-based Neuromorphic Sleep Monitoring System for Energy-efficient Edge Healthcare Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
Memristive Hodgkin-Huxley Neurons with Diverse Firing Patterns for High-Order Neuromorphic Computing.
Adv. Intell. Syst., February, 2025

Resistive memory-based zero-shot liquid state machine for multimodal event data learning.
Nat. Comput. Sci., January, 2025

In-Sensor Reservoir Computing Using Ferroelectric Optoelectronic Synapse for Near-Infrared Face Recognition.
Adv. Intell. Syst., 2025

SDISC: A Spike-Driven Human-Machine Interface with In-Situ Computing for Real-Time Low-Power Interaction.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
Ontological representation, modeling, and analysis of parasite vaccines.
J. Biomed. Semant., December, 2024

A Scalable Area-Efficient Low-Delay Asynchronous AER Circuits Design for Neuromorphic Chips.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024

Binary-Stochasticity-Enabled Highly Efficient Neuromorphic Deep Learning Achieves Better-than-Software Accuracy.
Adv. Intell. Syst., January, 2024

Dynamic neural network with memristive CIM and CAM for 2D and 3D vision.
CoRR, 2024

Continuous-Time Digital Twin with Analogue Memristive Neural Ordinary Differential Equation Solver.
CoRR, 2024

Efficient and accurate neural field reconstruction using resistive memory.
CoRR, 2024

Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model.
CoRR, 2024

2023
Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons.
IEEE J. Emerg. Sel. Topics Circuits Syst., December, 2023

Ultralow-Power Compact Artificial Synapse Based on a Ferroelectric Fin Field-Effect Transistor for Spatiotemporal Information Processing.
Adv. Intell. Syst., November, 2023

Echo state graph neural networks with analogue random resistive memory arrays.
Nat. Mac. Intell., February, 2023

Random resistive memory-based deep extreme point learning machine for unified visual processing.
CoRR, 2023

Pruning random resistive memory for optimizing analogue AI.
CoRR, 2023

Resistive memory-based zero-shot liquid state machine for multimodal event data learning.
CoRR, 2023

2022
A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

A neuromorphic core based on threshold switching memristor with asynchronous address event representation circuits.
Sci. China Inf. Sci., 2022

2021
Echo state graph neural networks with analogue random resistor arrays.
CoRR, 2021

Memristive Crossbar Arrays for Storage and Computing Applications.
Adv. Intell. Syst., 2021

2019
Reservoir Computing Using Diffusive Memristors.
Adv. Intell. Syst., 2019

An Asynchronous AER Circuits with Rotation Priority Tree Arbiter for Neuromorphic Hardware with Analog Neuron.
Proceedings of the 13th IEEE International Conference on ASIC, 2019


  Loading...