Srujan Kumar Kaile

Orcid: 0000-0003-2265-0496

According to our database1, Srujan Kumar Kaile authored at least 5 papers between 2022 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2023
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET.
IEEE J. Solid State Circuits, March, 2023

A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET.
IEEE J. Solid State Circuits, 2023

A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022
A 38GS/s 7b Time-Interleaved Pipelined-SAR ADC with Speed-Enhanced Bootstrapped Switch in 22nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

A Jitter-Robust 40Gb/s ADC-Based Multicarrier Receiver Front End in 22nm FinFET.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022


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