Stamatis G. Kavadias

According to our database1, Stamatis G. Kavadias authored at least 9 papers between 2007 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2019
Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability.
Trans. High Perform. Embed. Archit. Compil., 2019

2013
NP-SARC: Scalable network processing in the SARC multi-core FPGA platform.
J. Syst. Archit., 2013

2012
Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs.
Int. J. Parallel Program., 2012

2011
Fine-grain OpenMP runtime support with explicit communication hardware primitives.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Explicit Communication and Synchronization in SARC.
IEEE Micro, 2010

Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

On-chip communication and synchronization mechanisms with cache-integrated network interfaces.
Proceedings of the 7th Conference on Computing Frontiers, 2010

2009
FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability.
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

2007
Prototyping Efficient Interprocessor Communication Mechanisms.
Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007


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