Manolis Katevenis

According to our database, Manolis Katevenis authored at least 72 papers between 1982 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

Low-latency Communication in RISC-V Clusters.

Michalis Gianioudis, Pantelis Xirouchakis, Charisios Loukas, Evangelos Mageiropoulos, Orestis Mousouros, Sokratis Mpartzis, Aggelos Ioannou, Vassilis Papaefstathiou, Manolis Katevenis, Nikolaos Chrysos

Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region, 2024

2023

The ExaNeSt Prototype: Evaluation of Efficient HPC Communication Hardware in an ARM-based Multi-FPGA Rack.

Manolis Ploumidis, Fabien Chaix, Nikolaos Chrysos, Marios Asiminakis, Vassilis Flouris, Nikolaos D. Kallimanis, Nikolaos Kossifidis, Michael Nikoloudakis, Polydoros Petrakis, Nikolaos Dimou, Michalis Gianioudis, Georgios Ieronymakis, Aggelos Ioannou, George Kalokerinos, Pantelis Xirouchakis, Georgios Ailamakis, Astrinos Damianakis, Michael Ligerakis, Ioannis Makris, Theocharis Vavouris, Manolis Katevenis, Vassilis Papaefstathiou, Manolis Marazakis, Iakovos Mavroidis

CoRR, 2023

2022

Optimized Page Fault Handling During RDMA.

Antonis Psistakis, Nikos Chrysos, Fabien Chaix, Marios Asiminakis, Michalis Gianioudis, Pantelis Xirouchakis, Vassilis Papaefstathiou, Manolis Katevenis

IEEE Trans. Parallel Distributed Syst., 2022

RED-SEA: Network Solution for Exascale Architectures.

Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Matteo Turisini, Piero Vicini, Roberto Ammendola, Pascale Bernier-Bruna, Claire Chen, Said Derradji, Stéphane Guez, Pierre-Axel Lagadec, Gregoire Pichon, Etienne Walter, Gaetan De Gassowski, Matthieu Hautreaux, Stephane Mathieu, Gilles Moreau, Marc Pérache, Hugo Taboada, Torsten Hoefler, Timo Schneider, Matteo Barnaba, Giuseppe Piero Brandino, Francesco De Giorgi, Matteo Poggi, Iakovos Mavroidis, Yannis Papaefstathiou, Nikolaos Tampouratzis, Benjamin Kalisch, Ulrich Krackhardt, Mondrian Nuessle, Pantelis Xirouchakis, Vangelis Mageiropoulos, Michalis Gianioudis, Harisis Loukas, Aggelos Ioannou, Nikos Kallimanis, Nikos Chrysos, Manolis Katevenis, Wolfang Frings, Dominik Gottwald, Felime Guimaraes, Max Holicki, Volker Marx, Yannik Muller, Carsten Clauss, Hugo Falter, Xu Huang, Jennifer Lopez Barillao, Thomas Moschny, Simon Pickartz, Francisco J. Alfaro, Jesús Escudero-Sahuquillo, Pedro Javier García, Francisco J. Quiles, José L. Sánchez, Adrián Castelló, Jose Duro, María Engracia Gómez, Enrique S. Quintana-Ortí, Julio Sahuquillo, Eugenio Stabile

Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021

Using hls4ml to Map Convolutional Neural Networks on Interconnected FPGA Devices.

Evangelos Mageiropoulos, Nikolaos Chrysos, Nikolaos Dimou, Manolis Katevenis

Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

2020

PART: Pinning Avoidance in RDMA Technologies.

Antonis Psistakis, Nikos Chrysos, Fabien Chaix, Marios Asiminakis, Michalis Giannioudis, Pantelis Xirouchakis, Vassilis Papaefstathiou, Manolis Katevenis

Proceedings of the 14th IEEE/ACM International Symposium on Networks-on-Chip, 2020

2019

Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability.

George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Xiaojun Yang, Dionisios N. Pnevmatikatos, Manolis Katevenis

Trans. High Perform. Embed. Archit. Compil., 2019

Shall numerical astrophysics step into the era of Exascale computing?

Giuliano Taffoni, Giuseppe Murante, Luca Tornatore, David Goz, Stefano Borgani, Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis

CoRR, 2019

Software and Hardware Co-design for Low-Power HPC Platforms.

Manolis Ploumidis, Nikolaos D. Kallimanis, Marios Asiminakis, Nikos Chrysos, Pantelis Xirouchakis, Michalis Gianoudis, Leandros Tzanakis, Nikolaos Dimou, Antonis Psistakis, Panagiotis Peristerakis, Giorgos Kalokairinos, Vassilis Papaefstathiou, Manolis Katevenis

Proceedings of the High Performance Computing, 2019

Implementation and Impact of an Ultra-Compact Multi-FPGA Board for Large System Prototyping.

Fabien Chaix, Georgios Ailamakis, Theocharis Vavouris, Astrinos Damianakis, Manolis Katevenis, Iakovos Mavroidis, Aggelos Ioannou, Nikolaos Kossifidis, Nikolaos Dimou, Giorgos Ieronymakis, Manolis Marazakis, Vassilis Papaefstathiou, Vassilis Flouris, Mihailis Ligerakis

Proceedings of the 2019 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, 2019

Efficient Convolutional Neural Network Weight Compression for Space Data Classification on Multi-fpga Platforms.

George Pitsis, Grigorios Tsagkatakis, Christos Kozanitis, Ioannis Kalomoiris, Aggelos Ioannou, Apostolos Dollas, Manolis G. H. Katevenis, Panagiotis Tsakalides

Proceedings of the IEEE International Conference on Acoustics, 2019

Towards Exascale: Measuring the Energy Footprint of Astrophysics HPC Simulations.

Giuliano Taffoni, Manolis Katevenis, Renato Panchieri, Gino Perna, Luca Tornatore, David Goz, Antonio Ragagnin, Sara Bertocco, Igor Coretti, Manolis Marazakis, Fabien Chaix, Manolis Ploumidis

Proceedings of the 15th International Conference on eScience, 2019

2018

Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development.

Manolis Katevenis, Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Bernd Lietzow, Martin L. Kersten

Microprocess. Microsystems, 2018

Accurate Congestion Control for RDMA Transfers.

Dimitris Giannopoulos, Nikos Chrysos, Evangelos Mageiropoulos, Giannis Vardas, Leandros Tzanakis, Manolis Katevenis

Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

2017

Modeling energy-performance tradeoffs in ARM big.LITTLE architectures.

Evangelos Vasilakis, Ioannis Sourdis, Vassilis Papaefstathiou, Antonis Psathakis, Manolis G. H. Katevenis

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

The Next Generation of Exascale-Class Systems: The ExaNeSt Project.

Roberto Ammendola, Andrea Biagioni, Paolo Cretaro, Ottorino Frezza, Francesca Lo Cicero, Alessandro Lonardo, Michele Martinelli, Pier Stanislao Paolucci, Elena Pastorelli, Francesco Simula, Piero Vicini, Giuliano Taffoni, Jose Antonio Pascual, Javier Navaridas, Mikel Luján, John Goodacre, Nikolaos Chrysos, Manolis Katevenis

Proceedings of the Euromicro Conference on Digital System Design, 2017

2016

Discharging the Network From Its Flow Control Headaches: Packet Drops and HOL Blocking.

Nikolaos Chrysos, Lydia Y. Chen, Christoforos Kachris, Manolis Katevenis

IEEE/ACM Trans. Netw., 2016

The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems.

Manolis Katevenis, Nikolaos Chrysos, Manolis Marazakis, Iakovos Mavroidis, Fabien Chaix, Nikolaos D. Kallimanis, Javier Navaridas, John Goodacre, Piero Vicini, Andrea Biagioni, Pier Stanislao Paolucci, Alessandro Lonardo, Elena Pastorelli, Francesca Lo Cicero, Roberto Ammendola, P. Hopton, P. Coates, Giuliano Taffoni, Stefano Cozzini, Martin L. Kersten, Y. Zhang, Julio Sahuquillo, Sergio Lechago, C. Pinto, Bernd Lietzow, D. Everett, Gino Perna

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015

The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip Switches.

Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos

IEEE Micro, 2015

A Systematic Evaluation of Emerging Mesh-like CMP NoCs.

Antonis Psathakis, Vassilis Papaefstathiou, Nikolaos Chrysos, Fabien Chaix, Evangelos Vasilakis, Dionisios N. Pnevmatikatos, Manolis Katevenis

Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, 2015

2014

FPGA prototyping of emerging manycore architectures for parallel programming research using Formic boards.

Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Iakovos Mavroidis, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos

J. Syst. Archit., 2014

Design space exploration for fair resource-allocated NoC architectures.

Antonis Psathakis, Vassilis Papaefstathiou, Manolis Katevenis, Dionisios N. Pnevmatikatos

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Design trade-offs in energy efficient NoC architectures.

Antonis Psathakis, Vassilis Papaefstathiou, Manolis Katevenis, Dionisios N. Pnevmatikatos

Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014

EUROSERVER: Energy Efficient Node for European Micro-Servers.

Yves Durand, Paul M. Carpenter, Stefano Adami, Angelos Bilas, Denis Dutoit, Alexis Farcy, Georgi Gaydadjiev, John Goodacre, Manolis Katevenis, Manolis Marazakis, Emil Matús, Iakovos Mavroidis, John Thomson

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013

NP-SARC: Scalable network processing in the SARC multi-core FPGA platform.

Christoforos Kachris, George Nikiforos, Vassilis Papaefstathiou, Stamatis G. Kavadias, Manolis Katevenis

J. Syst. Archit., 2013

Prefetching and cache management using task lifetimes.

Vassilis Papaefstathiou, Manolis Katevenis, Dimitrios S. Nikolopoulos, Dionisios N. Pnevmatikatos

Proceedings of the International Conference on Supercomputing, 2013

2012

LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors.

Darío Suárez Gracia, Giorgos Dimitrakopoulos, Teresa Monreal Arnal, Manolis Katevenis, Víctor Viñals Yúfera

IEEE Trans. Very Large Scale Integr. Syst., 2012

Crossbar NoCs Are Scalable Beyond 100 Nodes.

Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Cache-Integrated Network Interfaces: Flexible On-Chip Communication and Synchronization for Large-Scale CMPs.

Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos

Int. J. Parallel Program., 2012

Formic: Cost-efficient and Scalable Prototyping of Manycore Architectures.

Spyros Lyberis, George Kalokerinos, Michalis Lygerakis, Vassilis Papaefstathiou, Dimitrios Tsaliagkos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Dimitrios S. Nikolopoulos

Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011

Distributed WFQ scheduling converging to weighted max-min fairness.

Nikolaos Chrysos, Manolis Katevenis

Comput. Networks, 2011

VLSI micro-architectures for high-radix crossbar schedulers.

Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos

Proceedings of the NOCS 2011, 2011

An efficient sequential iterative matching algorithm for CIOQ switches.

Yanping Gao, Christoforos Kachris, Manolis Katevenis

Proceedings of the 16th IEEE Symposium on Computers and Communications, 2011

Fine-grain OpenMP runtime support with explicit communication hardware primitives.

Pranav Tendulkar, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Dimitrios S. Nikolopoulos, Manolis Katevenis

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Explicit Communication and Synchronization in SARC.

Manolis Katevenis, Vassilis Papaefstathiou, Stamatis G. Kavadias, Dionisios N. Pnevmatikatos, Federico Silla, Dimitrios S. Nikolopoulos

IEEE Micro, 2010

Network Processing in Multi-core FPGAs with Integrated Cache-Network Interface.

Christoforos Kachris, George Nikiforos, Stamatis G. Kavadias, Vassilis Papaefstathiou, Manolis Katevenis

Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area.

Giorgos Passas, Manolis Katevenis, Dionisios N. Pnevmatikatos

Proceedings of the NOCS 2010, 2010

Efficient implementation of CIOQ switches with sequential iterative matching algorithms.

Xiaojun Yang, Christoforos Kachris, Manolis Katevenis

Proceedings of the International Conference on Field-Programmable Technology, 2010

On-chip communication and synchronization mechanisms with cache-integrated network interfaces.

Stamatis G. Kavadias, Manolis Katevenis, Michail Zampetakis, Dimitrios S. Nikolopoulos

Proceedings of the 7th Conference on Computing Frontiers, 2010

End-to-end congestion management for non-blocking multi-stage switching fabrics.

Nikolaos Chrysos, Lydia Y. Chen, Cyriel Minkenberg, Christoforos Kachris, Manolis Katevenis

Proceedings of the 2010 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, 2010

2009

FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability.

George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis G. Kavadias, Manolis Katevenis, Dionisios N. Pnevmatikatos, Xiaojun Yang

Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, 2009

2008

Building an FoC Using Large, Buffered Crossbar Cores.

Dimitrios Simos, Ioannis Papaefstathiou, Manolis Katevenis

IEEE Des. Test Comput., 2008

Towards unified mechanisms for inter-processor communication.

Manolis Katevenis

Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, 2008

2007

Pipelined heap (priority queue) management for advanced scheduling in high-speed networks.

Aggelos Ioannou, Manolis Katevenis

IEEE/ACM Trans. Netw., 2007

Prototyping Efficient Interprocessor Communication Mechanisms.

Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos, Manolis Marazakis, Giorgos Kalokairinos, Aggelos Ioannou, Michael Papamichael, Stamatis G. Kavadias, Giorgos Mihelogiannakis, Manolis Katevenis

Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007

Approaching Ideal NoC Latency with Pre-Configured Routes.

George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis

Proceedings of the First International Symposium on Networks-on-Chips, 2007

2006

Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics.

Nikolaos Chrysos, Manolis Katevenis

Proceedings of the INFOCOM 2006. 25th IEEE International Conference on Computer Communications, 2006

2005

Benes switching fabrics with O(N)-complexity internal backpressure.

Georgios Sapountzis, Manolis Katevenis

IEEE Commun. Mag., 2005

Variable-size multipacket segments in buffered crossbar (CICQ) architectures.

Manolis Katevenis, Giorgos Passas

Proceedings of IEEE International Conference on Communications, 2005

Scheduling in switches with small internal buffers.

Nikolaos Chrysos, Manolis Katevenis

Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

2004

Variable packet size buffered crossbar (CICQ) switches.

Manolis Katevenis, Giorgos Passas, Dimitrios Simos, Ioannis Papaefstathiou, Nikolaos Chrysos

Proceedings of IEEE International Conference on Communications, 2004

Multiple priorities in a two-lane buffered crossbar.

Nikolaos Chrysos, Manolis Katevenis

Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004

2002

Web-conscious storage management for web proxies.

Evangelos P. Markatos, Dionisios N. Pnevmatikatos, Michail Flouris, Manolis Katevenis

IEEE/ACM Trans. Netw., 2002

2001

Wormhole IP over (connectionless) ATM.

Manolis Katevenis, Iakovos Mavroidis, Georgios Sapountzis, Evangelia Kalyvianaki, Ioannis Mavroidis, Georgios Glykopoulos

IEEE/ACM Trans. Netw., 2001

Efficient per-flow queueing in DRAM at OC-192 line rate using out-of-order execution techniques.

Aggelos Nikologiannis, Manolis Katevenis

Proceedings of the IEEE International Conference on Communications, 2001

1999

ATLAS I: implementing a single-chip ATM switch with backpressure.

George Kornaros, Dionisios N. Pnevmatikatos, Panagiota Vatsolaki, George Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios N. Serpanos, Manolis Katevenis

IEEE Micro, 1999

The Remote Enqueue Operation on Networks of Workstations.

Manolis Katevenis, Evangelos P. Markatos, Penny Vatsolaki, Chara Xanthaki

Informatica (Slovenia), 1999

Secondary Storage Management for Web Proxies.

Evangelos P. Markatos, Manolis Katevenis, Dionisios N. Pnevmatikatos, Michail Flouris

Proceedings of the 2nd USENIX Symposium on Internet Technologies and Systems, 1999

1998

ATLAS I: a single-chip, gigabit ATM switch with HIC/HS links arid multi-lane back-pressure.

Manolis Katevenis, Dimitrios N. Serpanos, George Dimitriadis

Microprocess. Microsystems, 1998

Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch.

Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis

Proceedings of the Fourth International Symposium on High-Performance Computer Architecture, Las Vegas, Nevada, USA, January 31, 1998

The Remote Enqueue Operation on Networks of Workstations.

Evangelos P. Markatos, Manolis Katevenis, Penny Vatsolaki

Proceedings of the Network-Based Parallel Computing: Communication, 1998

1997

Telegraphos: A Substrate for High-Performance Computing on Workstation Clusters.

Manolis Katevenis, Evangelos P. Markatos, George Kalokerinos, Apostolos Dollas

J. Parallel Distributed Comput., 1997

User-Level DMA without Operating System Kernel Modification.

Evangelos P. Markatos, Manolis Katevenis

Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997

ATLAS: A Single-Chip ATM Switch for NOWs.

Manolis Katevenis, Panagiota Vatsolaki, Dimitrios N. Serpanos, Evangelos P. Markatos

Proceedings of the Communication and Architectural Support for Network-Based Parallel Computing, 1997

Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control.

George Kornaros, Christoforos E. Kozyrakis, Panagiota Vatsolaki, Manolis Katevenis

Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997

1996

Telegraphos: High-Performance Networking for Parallel Processing on Workstation Clusters.

Evangelos P. Markatos, Manolis Katevenis

Proceedings of the Second International Symposium on High-Performance Computer Architecture, 1996

1995

Pipelined Memory Shared Buffer for VLSI Switches.

Manolis Katevenis, Panagiota Vatsolaki, Aristides Efthymiou

Proceedings of the ACM SIGCOMM 1995 Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication, Cambridge, MA, USA, August 28, 1995

1991

Weighted Round-Robin Cell Multiplexing in a General-Purpose ATM Switch Chip.

Manolis Katevenis, Stefanos Sidiropoulos, Costas Courcoubetis

IEEE J. Sel. Areas Commun., 1991

Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory.

Manolis Katevenis, Nestoras Tzartzanis

Proceedings of the ASPLOS-IV Proceedings, 1991

1987

Fast switching and fair control of congested flow in broadband networks.

Manolis Katevenis

IEEE J. Sel. Areas Commun., 1987

A Vector Hardware Accelerator with Circuit Simulation Emphasis.

Andrei Vladimirescu, David Weiss, Manolis Katevenis, Zvika Bronstein, Alon Kifir, Karja Danuwidjaja, K. C. Ng, Niraj Jain, Steven Lass

Proceedings of the 24th ACM/IEEE Design Automation Conference. Miami Beach, FL, USA, June 28, 1987

1982

A RISCy approach to VLSI.

Daniel T. Fitzpatrick, John K. Foderaro, Manolis G. H. Katevenis, Howard A. Landman, David A. Patterson, James B. Peek, Zvi Peshkess, Carlo H. Séquin, Robert W. Sherburne, Korbin S. Van Dyke

SIGARCH Comput. Archit. News, 1982