Michael Papamichael

According to our database, Michael Papamichael authored at least 21 papers between 2007 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Inside Project Brainwave's Cloud-Scale, Real-Time AI Processor.

Jeremy Fowers, Kalin Ovtcharov, Michael K. Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger

IEEE Micro, 2019

2018

Serving DNNs in Real Time at Datacenter Scale with Project Brainwave.

Eric S. Chung, Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Adrian M. Caulfield, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Maleen Abeydeera, Logan Adams, Hari Angepat, Christian Boehn, Derek Chiou, Oren Firestein, Alessandro Forin, Kang Su Gatlin, Mahdi Ghandi, Stephen Heil, Kyle Holohan, Ahmad El Husseini, Tamás Juhász, Kara Kagi, Ratna Kovvuri, Sitaram Lanka, Friedel van Megen, Dima Mukhortov, Prerak Patel, Brandon Perez, Amanda Rapsang, Steven K. Reinhardt, Bita Rouhani, Adam Sapek, Raja Seera, Sangeetha Shekar, Balaji Sridharan, Gabriel Weisz, Lisa Woods, Phillip Yi Xiao, Dan Zhang, Ritchie Zhao, Doug Burger

IEEE Micro, 2018

A Configurable Cloud-Scale DNN Processor for Real-Time AI.

Jeremy Fowers, Kalin Ovtcharov, Michael Papamichael, Todd Massengill, Ming Liu, Daniel Lo, Shlomi Alkalay, Michael Haselman, Logan Adams, Mahdi Ghandi, Stephen Heil, Prerak Patel, Adam Sapek, Gabriel Weisz, Lisa Woods, Sitaram Lanka, Steven K. Reinhardt, Adrian M. Caulfield, Eric S. Chung, Doug Burger

Proceedings of the 45th ACM/IEEE Annual International Symposium on Computer Architecture, 2018

2017

Configurable Clouds.

Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Daniel Firestone, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger

IEEE Micro, 2017

HPC on FPGA clouds: 3D FFTs and implications for molecular dynamics.

Jiayi Sheng, Chen Yang, Ahmed Sanaullah, Michael Papamichael, Adrian M. Caulfield, Martin C. Herbordt

Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016

A cloud-scale acceleration architecture.

Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Agile Co-Design for a Reconfigurable Datacenter.

Shlomi Alkalay, Hari Angepat, Adrian M. Caulfield, Eric S. Chung, Oren Firestein, Michael Haselman, Stephen Heil, Kyle Holohan, Matt Humphrey, Tamás Juhász, Puneet Kaur, Sitaram Lanka, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Andrew Putnam, Raja Seera, Rimon Tadros, Jason Thong, Lisa Woods, Derek Chiou, Doug Burger

Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

2015

The CONNECT Network-on-Chip Generator.

Michael K. Papamichael, James C. Hoe

Computer, 2015

DELPHI: a framework for RTL-based architecture design evaluation using DSENT models.

Michael Papamichael, Cagla Cakir, Chen Sun, Chia-Hsin Owen Chen, James C. Hoe, Ken Mai, Li-Shiuan Peh, Vladimir Stojanovic

Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Nautilus: fast automated IP design space search using guided genetic algorithms.

Michael K. Papamichael, Peter A. Milder, James C. Hoe

Proceedings of the 52nd Annual Design Automation Conference, 2015

2013

Cross-platform FPGA accelerator development using CoRAM and CONNECT.

Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Towards automatic customization of interconnect and memory in the CoRAM abstraction (abstract only).

Eric S. Chung, Michael Papamichael

Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

ShrinkWrap: Compiler-Enabled Optimization and Customization of Soft Memory Interconnects.

Eric S. Chung, Michael Papamichael

Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012

CONNECT: re-examining conventional wisdom for designing nocs in the context of FPGAs.

Michael Papamichael, James C. Hoe

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

Prototype and evaluation of the CoRAM memory architecture for FPGA-based computing.

Eric S. Chung, Michael Papamichael, Gabriel Weisz, James C. Hoe, Ken Mai

Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2011

Thread Cluster Memory Scheduling.

Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter

IEEE Micro, 2011

FIST: A fast, lightweight, FPGA-friendly packet latency estimator for NoC modeling in full-system simulations.

Michael Papamichael, James C. Hoe, Onur Mutlu

Proceedings of the NOCS 2011, 2011

Fast scalable FPGA-based Network-on-Chip simulation models.

Michael Papamichael

Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

2010

Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior.

Yoongu Kim, Michael Papamichael, Onur Mutlu, Mor Harchol-Balter

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

2009

ProtoFlex: Towards Scalable, Full-System Multiprocessor Simulations Using FPGAs.

Eric S. Chung, Michael Papamichael, Eriko Nurvitadhi, James C. Hoe, Ken Mai, Babak Falsafi

ACM Trans. Reconfigurable Technol. Syst., 2009

2007

Prototyping Efficient Interprocessor Communication Mechanisms.

Vassilis Papaefstathiou, Dionisios N. Pnevmatikatos, Manolis Marazakis, Giorgos Kalokairinos, Aggelos Ioannou, Michael Papamichael, Stamatis G. Kavadias, Giorgos Mihelogiannakis, Manolis Katevenis

Proceedings of the 2007 International Conference on Embedded Computer Systems: Architectures, 2007