Stefan Gehrer

According to our database1, Stefan Gehrer authored at least 12 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
Side-Channel Analysis of the Xilinx Zynq UltraScale+ Encryption Engine.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

2020
Applications of machine learning techniques in side-channel attacks: a survey.
J. Cryptogr. Eng., 2020

Encoding Power Traces as Images for Efficient Side-Channel Analysis.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

Lightweight Side-Channel Protection using Dynamic Clock Randomization.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Deep Learning Multi-Channel Fusion Attack Against Side-Channel Protected Hardware.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Deep Neural Network Attribution Methods for Leakage Analysis and Symmetric Key Recovery.
IACR Cryptol. ePrint Arch., 2019

Securing Cryptographic Circuits by Exploiting Implementation Diversity and Partial Reconfiguration on FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Profiled Power Analysis Attacks Using Convolutional Neural Networks with Domain Knowledge.
Proceedings of the Selected Areas in Cryptography - SAC 2018, 2018

2016
Area-Efficient PUF-Based Key Generation on System-on-Chips with FPGAs.
J. Circuits Syst. Comput., 2016

2015
Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

Aging effects on ring-oscillator-based physical unclonable functions on FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

2014
Reconfigurable PUFs for FPGA-based SoCs.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014


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