Jan Richter-Brockmann

Orcid: 0000-0002-8454-4755

According to our database1, Jan Richter-Brockmann authored at least 21 papers between 2020 and 2024.

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Bibliography

2024
Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

Combined Threshold Implementation.
IACR Cryptol. ePrint Arch., 2024

HADES: Automated Hardware Design Exploration for Cryptographic Primitives.
IACR Cryptol. ePrint Arch., 2024

2023
Revisiting Fault Adversary Models - Hardware Faults in Theory and Practice.
IEEE Trans. Computers, February, 2023

Secure and efficient hardware implementations for modern cryptography.
PhD thesis, 2023

Gate-Level Masking of Streamlined NTRU Prime Decapsulation in Hardware.
IACR Cryptol. ePrint Arch., 2023

Generic Accelerators for Costly-to-Mask PQC Components.
IACR Cryptol. ePrint Arch., 2023

Combined Private Circuits - Combined Security Refurbished.
IACR Cryptol. ePrint Arch., 2023

Dependability of Future Edge-AI Processors: Pandora's Box.
Proceedings of the IEEE European Test Symposium, 2023

2022
VERICA - Verification of Combined Attacks Automated formal verification of security against simultaneous information leakage and tampering.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices.
IEEE Trans. Computers, 2022

A Holistic Approach Towards Side-Channel Secure Fixed-Weight Polynomial Sampling.
IACR Cryptol. ePrint Arch., 2022

Efficiently Masking Polynomial Inversion at Arbitrary Order.
IACR Cryptol. ePrint Arch., 2022

CINI MINIS: Domain Isolation for Fault and Combined Security.
IACR Cryptol. ePrint Arch., 2022

2021
FIVER - Robust Verification of Countermeasures against Fault Injections.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

2020
Revisiting ECM on GPUs.
IACR Cryptol. ePrint Arch., 2020

Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices.
IACR Cryptol. ePrint Arch., 2020

Improved Side-Channel Resistance by Dynamic Fault-Injection Countermeasures.
IACR Cryptol. ePrint Arch., 2020

Deep Learning Multi-Channel Fusion Attack Against Side-Channel Protected Hardware.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Concurrent error detection revisited: hardware protection against fault and side-channel attacks.
Proceedings of the ARES 2020: The 15th International Conference on Availability, 2020


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