Tim Güneysu

Affiliations:
  • Ruhr University of Bochum, Germany
  • German Research Center for Artificial Intelligence (DFKI), Bremen, Germany
  • University of Bremen, Germany


According to our database1, Tim Güneysu authored at least 190 papers between 2007 and 2024.

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Bibliography

2024
Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

A Tale of Snakes and Horses: Amplifying Correlation Power Analysis on Quadratic Maps.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024

Correction Fault Attacks on Randomized CRYSTALS-Dilithium.
IACR Cryptol. ePrint Arch., 2024

HADES: Automated Hardware Design Exploration for Cryptographic Primitives.
IACR Cryptol. ePrint Arch., 2024

Practical Post-Quantum Signatures for Privacy.
IACR Cryptol. ePrint Arch., 2024

2023
Revisiting Fault Adversary Models - Hardware Faults in Theory and Practice.
IEEE Trans. Computers, February, 2023

Challenges and Opportunities of Security-Aware EDA.
ACM Trans. Embed. Comput. Syst., 2023

Risky Translations: Securing TLBs against Timing Side Channels.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

Recommendation for a holistic secure embedded ISA extension.
IACR Cryptol. ePrint Arch., 2023

Improved Circuit Synthesis with Amortized Bootstrapping for FHEW-like Schemes.
IACR Cryptol. ePrint Arch., 2023

A New Perspective on Key Switching for BGV-like Schemes.
IACR Cryptol. ePrint Arch., 2023

Implementing and Optimizing Matrix Triples with Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2023

Gate-Level Masking of Streamlined NTRU Prime Decapsulation in Hardware.
IACR Cryptol. ePrint Arch., 2023

Generic Accelerators for Costly-to-Mask PQC Components.
IACR Cryptol. ePrint Arch., 2023

Quantitative Fault Injection Analysis.
IACR Cryptol. ePrint Arch., 2023

Combined Private Circuits - Combined Security Refurbished.
IACR Cryptol. ePrint Arch., 2023

HAETAE: Shorter Lattice-Based Fiat-Shamir Signatures.
IACR Cryptol. ePrint Arch., 2023

FANNG-MPC: Framework for Artificial Neural Networks and Generic MPC.
IACR Cryptol. ePrint Arch., 2023

On The Effect of Replacement Policies on The Security of Randomized Cache Architectures.
CoRR, 2023

ClepsydraCache - Preventing Cache Attacks with Time-Based Evictions.
Proceedings of the 32nd USENIX Security Symposium, 2023

Dependability of Future Edge-AI Processors: Pandora's Box.
Proceedings of the IEEE European Test Symposium, 2023


EasiMask-Towards Efficient, Automated, and Secure Implementation of Masking in Hardware.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
VERICA - Verification of Combined Attacks Automated formal verification of security against simultaneous information leakage and tampering.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Racing BIKE: Improved Polynomial Multiplication and Inversion in Hardware.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Randomness Optimization for Gadget Compositions in Higher-Order Masking.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices.
IEEE Trans. Computers, 2022

Breaking and Protecting the Crystal: Side-Channel Analysis of Dilithium in Hardware.
IACR Cryptol. ePrint Arch., 2022

Finding and Evaluating Parameters for BGV.
IACR Cryptol. ePrint Arch., 2022

A Holistic Approach Towards Side-Channel Secure Fixed-Weight Polynomial Sampling.
IACR Cryptol. ePrint Arch., 2022

Efficiently Masking Polynomial Inversion at Arbitrary Order.
IACR Cryptol. ePrint Arch., 2022

Proof-of-possession for KEM certificates using verifiable generation.
IACR Cryptol. ePrint Arch., 2022

CINI MINIS: Domain Isolation for Fault and Combined Security.
IACR Cryptol. ePrint Arch., 2022

SCARF: A Low-Latency Block Cipher for Secure Cache-Randomization.
IACR Cryptol. ePrint Arch., 2022

CONVOLVE: Smart and seamless design of smart edge processors.
CoRR, 2022

Write Me and I'll Tell You Secrets - Write-After-Write Effects On Intel CPUs.
Proceedings of the 25th International Symposium on Research in Attacks, 2022

Carry-Less to BIKE Faster.
Proceedings of the Applied Cryptography and Network Security, 2022

2021
LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

FIVER - Robust Verification of Countermeasures against Fault Injections.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

Side-Channel Analysis of the Xilinx Zynq UltraScale+ Encryption Engine.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2021

A Configurable Hardware Implementation of XMSS.
IACR Cryptol. ePrint Arch., 2021

A Hard Crystal - Implementing Dilithium on Reconfigurable Hardware.
IACR Cryptol. ePrint Arch., 2021

BasicBlocker: ISA Redesign to Make Spectre-Immune CPUs Faster.
Proceedings of the RAID '21: 24th International Symposium on Research in Attacks, 2021


Automated Masking of Software Implementations on Industrial Microcontrollers.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
High-Speed Masking for Polynomial Comparison in Lattice-based KEMs.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020

Applications of machine learning techniques in side-channel attacks: a survey.
J. Cryptogr. Eng., 2020

Revisiting ECM on GPUs.
IACR Cryptol. ePrint Arch., 2020

Folding BIKE: Scalable Hardware Implementation for Reconfigurable Devices.
IACR Cryptol. ePrint Arch., 2020

Improved Side-Channel Resistance by Dynamic Fault-Injection Countermeasures.
IACR Cryptol. ePrint Arch., 2020

BasicBlocker: Redesigning ISAs to Eliminate Speculative-Execution Attacks.
CoRR, 2020

Encoding Power Traces as Images for Efficient Side-Channel Analysis.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

Verification of Embedded Binaries using Coverage-guided Fuzzing with SystemC-based Virtual Prototypes.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Lightweight Side-Channel Protection using Dynamic Clock Randomization.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Deep Learning Multi-Channel Fusion Attack Against Side-Channel Protected Hardware.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Concurrent error detection revisited: hardware protection against fault and side-channel attacks.
Proceedings of the ARES 2020: The 15th International Conference on Availability, 2020

2019
Evaluation of (power) side-channels in cryptographic implementations.
it Inf. Technol., 2019

Efficiently Masking Binomial Sampling at Arbitrary Orders for Lattice-Based Crypto.
IACR Cryptol. ePrint Arch., 2019

Deep Neural Network Attribution Methods for Leakage Analysis and Symmetric Key Recovery.
IACR Cryptol. ePrint Arch., 2019

Efficient Microcontroller Implementation of BIKE.
Proceedings of the Innovative Security Solutions for Information Technology and Communications, 2019

Towards Practical Microcontroller Implementation of the Signature Scheme Falcon.
Proceedings of the Post-Quantum Cryptography - 10th International Conference, 2019

Securing Cryptographic Circuits by Exploiting Implementation Diversity and Partial Reconfiguration on FPGAs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Practical CCA2-Secure and Masked Ring-LWE Implementation.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

Standard Lattice-Based Key Encapsulation on Embedded Devices.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018

GliFreD: Glitch-Free Duplication Towards Power-Equalized Circuits on FPGAs.
IEEE Trans. Computers, 2018

Exploring RFC 7748 for Hardware Implementation: Curve25519 and Curve448 with Side-Channel Protection.
J. Hardw. Syst. Secur., 2018

Profiled Power Analysis Attacks Using Convolutional Neural Networks with Domain Knowledge.
Proceedings of the Selected Areas in Cryptography - SAC 2018, 2018

Towards Self-Explaining Digital Systems: A Design Methodology for the Next Generation.
Proceedings of the 3rd IEEE International Verification and Security Workshop, 2018

Evaluation of Lattice-Based Signature Schemes in Embedded Systems.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Exploring the Vulnerability of R-LWE Encryption to Fault Attacks.
Proceedings of the Fifth Workshop on Cryptography and Security in Computing Systems, 2018

Physical Protection of Lattice-Based Cryptography: Challenges and Solutions.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Confident leakage assessment - A side-channel evaluation framework based on confidence intervals.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
High-Performance Ideal Lattice-Based Cryptography on 8-Bit AVR Microcontrollers.
ACM Trans. Embed. Comput. Syst., 2017

Compact Constant Weight Coding Engines for the Code-Based Cryptography.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Strong 8-bit Sboxes with efficient masking in hardware extended version.
J. Cryptogr. Eng., 2017

An Investigation of Sources of Randomness Within Discrete Gaussian Sampling.
IACR Cryptol. ePrint Arch., 2017

CAKE: Code-based Algorithm for Key Encapsulation.
IACR Cryptol. ePrint Arch., 2017

Securing Systems With Indispensable Entropy: LWE-Based Lossless Computational Fuzzy Extractor for the Internet of Things.
IEEE Access, 2017

Implementing the NewHope-Simple Key Exchange on Low-Cost FPGAs.
Proceedings of the Progress in Cryptology - LATINCRYPT 2017, 2017

Towards lightweight Identity-Based Encryption for the post-quantum-secure Internet of Things.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

LWE-based lossless computational fuzzy extractor for the Internet of Things.
Proceedings of the 2017 IEEE International Symposium on Hardware Oriented Security and Trust, 2017

A fair and comprehensive large-scale analysis of oscillation-based PUFs for FPGAs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

Cryptography for Next Generation TLS: Implementing the RFC 7748 Elliptic Curve448 Cryptosystem in Hardware.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Introduction to the CHES 2015 special issue.
J. Cryptogr. Eng., 2016

Bridging the Gap: Advanced Tools for Side-Channel Leakage Estimation beyond Gaussian Templates and Histograms.
IACR Cryptol. ePrint Arch., 2016

ParTI - Towards Combined Hardware Countermeasures against Side-Channel and Fault-Injection Attacks.
IACR Cryptol. ePrint Arch., 2016

Hiding Higher-Order Side-Channel Leakage - Randomizing Cryptographic Implementations in Reconfigurable Hardware.
IACR Cryptol. ePrint Arch., 2016

White-Box Cryptography in the Gray Box - A Hardware Implementation and its Side Channels.
IACR Cryptol. ePrint Arch., 2016

Closing the Gap in RFC 7748: Implementing Curve448 in Hardware.
IACR Cryptol. ePrint Arch., 2016

Securing Systems with Scarce Entropy: LWE-Based Lossless Computational Fuzzy Extractor for the IoT.
IACR Cryptol. ePrint Arch., 2016

Strong 8-bit Sboxes with Efficient Masking in Hardware.
IACR Cryptol. ePrint Arch., 2016

Information reconciliation schemes in physical-layer security: A survey.
Comput. Networks, 2016

IND-CCA Secure Hybrid Encryption from QC-MDPC Niederreiter.
Proceedings of the Post-Quantum Cryptography - 7th International Workshop, 2016

Secure software update and IP protection for untrusted devices in the Internet of Things via physically unclonable functions.
Proceedings of the 2016 IEEE International Conference on Pervasive Computing and Communication Workshops, 2016

Lattice-based cryptography: From reconfigurable hardware to ASIC.
Proceedings of the International Symposium on Integrated Circuits, 2016

Secure and Private, yet Lightweight, Authentication for the IoT via PUF and CBKA.
Proceedings of the Information Security and Cryptology - ICISC 2016 - 19th International Conference, Seoul, South Korea, November 30, 2016

On the problems of realizing reliable and efficient ring oscillator PUFs on FPGAs.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016

Standard lattices in hardware.
Proceedings of the 53rd Annual Design Automation Conference, 2016

Secure architectures of future emerging cryptography <i>SAFEcrypto</i>.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

ParTI: Towards Combined Hardware Countermeasures against Side-Channeland Fault-Injection Attacks.
Proceedings of the ACM Workshop on Theory of Implementation Security, 2016

On the Energy Cost of Channel Based Key Agreement.
Proceedings of the 6th International Workshop on Trustworthy Embedded Devices, 2016

Sixth International Workshop on Trustworthy Embedded Devices (TrustED 2016).
Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security, 2016

High-Performance and Lightweight Lattice-Based Public-Key Encryption.
Proceedings of the 2nd ACM International Workshop on IoT Privacy, Trust, and Security, 2016

A grain in the silicon: SCA-protected AES in less than 30 slices.
Proceedings of the 27th IEEE International Conference on Application-specific Systems, 2016

2015
Implementing Curve25519 for Side-Channel-Protected Elliptic Curve Cryptography.
ACM Trans. Reconfigurable Technol. Syst., 2015

Introduction for Embedded Platforms for Cryptography in the Coming Decade.
ACM Trans. Embed. Comput. Syst., 2015

Implementing QC-MDPC McEliece Encryption.
ACM Trans. Embed. Comput. Syst., 2015

Practical Lattice-Based Digital Signature Schemes.
ACM Trans. Embed. Comput. Syst., 2015

Lattice-Based Signatures: Optimization and Implementation on Reconfigurable Hardware.
IEEE Trans. Computers, 2015

Evaluating the Duplication of Dual-Rail Precharge Logics on FPGAs.
IACR Cryptol. ePrint Arch., 2015

Robust and One-Pass Parallel Computation of Correlation-Based Attacks at Arbitrary Order.
IACR Cryptol. ePrint Arch., 2015

Arithmetic Addition over Boolean Masking - Towards First- and Second-Order Resistance in Hardware.
IACR Cryptol. ePrint Arch., 2015

Achieving Side-Channel Protection with Dynamic Logic Reconfiguration on Modern FPGAs.
IACR Cryptol. ePrint Arch., 2015

Side-Channel Protection by Randomizing Look-Up Tables on Reconfigurable Hardware - Pitfalls of Memory Primitives.
IACR Cryptol. ePrint Arch., 2015

Affine Equivalence and its Application to Tightening Threshold Implementations.
IACR Cryptol. ePrint Arch., 2015

Speed Records for Ideal Lattice-Based Cryptography on AVR.
IACR Cryptol. ePrint Arch., 2015

Smaller Keys for Code-Based Cryptography: QC-MDPC McEliece Implementations on Embedded Devices.
IACR Cryptol. ePrint Arch., 2015

Securing systems on the Internet of Things via physical properties of devices and communications.
Proceedings of the Annual IEEE Systems Conference, 2015

High-Performance Ideal Lattice-Based Cryptography on 8-Bit ATxmega Microcontrollers.
Proceedings of the Progress in Cryptology - LATINCRYPT 2015, 2015

Security analysis of index-based syndrome coding for PUF-based key generation.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2015

New ASIC/FPGA Cost Estimates for SHA-1 Collisions.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

2014
Cryptographic Algorithms on the GA144 Asynchronous Multi-Core Processor - Implementation and Side-Channel Analysis.
J. Signal Process. Syst., 2014

Enhanced Lattice-Based Signatures on Reconfigurable Hardware.
IACR Cryptol. ePrint Arch., 2014

A hardware-assisted proof-of-concept for secure VoIP clients on untrusted operating systems.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

Towards Side-Channel Resistant Implementations of QC-MDPC McEliece Encryption on Constrained Devices.
Proceedings of the Post-Quantum Cryptography - 6th International Workshop, 2014

High-Speed Signatures from Standard Lattices.
Proceedings of the Progress in Cryptology - LATINCRYPT 2014, 2014

Area optimization of lightweight lattice-based encryption on reconfigurable hardware.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Enabling SRAM-PUFs on Xilinx FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

THOR - The hardware onion router.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Fault Sensitivity Analysis Meets Zero-Value Attack.
Proceedings of the 2014 Workshop on Fault Diagnosis and Tolerance in Cryptography, 2014

Lightweight code-based cryptography: QC-MDPC McEliece encryption on reconfigurable devices.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Beyond ECDSA and RSA: Lattice-based Digital Signatures on Constrained Devices.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Efficient Elliptic-Curve Cryptography Using Curve25519 on Reconfigurable Devices.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

MicroACP - A Fast and Secure Reconfigurable Asymmetric Crypto-Processor - -Overhead Evaluation of Side-Channel Countermeasures-.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
Code-based cryptography on reconfigurable hardware: tweaking Niederreiter encryption for performance.
J. Cryptogr. Eng., 2013

Towards Practical Lattice-Based Public-Key Encryption on Reconfigurable Hardware.
Proceedings of the Selected Areas in Cryptography - SAC 2013, 2013

Software Speed Records for Lattice-Based Signatures.
Proceedings of the Post-Quantum Cryptography - 5th International Workshop, 2013

Efficient implementation of cryptographic primitives on the GA144 multi-core architecture.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

Attacking Atmel's CryptoMemory EEPROM with Special-Purpose Hardware.
Proceedings of the Applied Cryptography and Network Security, 2013

2012
Using Data Contention in Dual-ported Memories for Security Applications.
J. Signal Process. Syst., 2012

Side channels as building blocks.
J. Cryptogr. Eng., 2012

PRINCE - A Low-latency Block Cipher for Pervasive Computing Applications (Full version).
IACR Cryptol. ePrint Arch., 2012

Compact Implementation and Performance Evaluation of Hash Functions in ATtiny Devices.
IACR Cryptol. ePrint Arch., 2012

Two IP protection schemes for multi-FPGA systems.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

IPSecco: A lightweight and reconfigurable IPSec core.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Towards Efficient Arithmetic for Lattice-Based Cryptography on Reconfigurable Hardware.
Proceedings of the Progress in Cryptology - LATINCRYPT 2012, 2012

Embedded Syndrome-Based Hashing.
Proceedings of the Progress in Cryptology, 2012

Evaluation of Standardized Password-Based Key Derivation against Parallel Processing Platforms.
Proceedings of the Computer Security - ESORICS 2012, 2012

Towards One Cycle per Bit Asymmetric Encryption: Code-Based Cryptography on Reconfigurable Hardware.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012

Practical Lattice-Based Cryptography: A Signature Scheme for Embedded Systems.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012

PRINCE - A Low-Latency Block Cipher for Pervasive Computing Applications - Extended Abstract.
Proceedings of the Advances in Cryptology - ASIACRYPT 2012, 2012

Securely Sealing Multi-FPGA Systems.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

Compact Implementation and Performance Evaluation of Block Ciphers in ATtiny Devices.
Proceedings of the Progress in Cryptology - AFRICACRYPT 2012, 2012

2011
FPGAs in Cryptography.
Proceedings of the Encyclopedia of Cryptography and Security, 2nd Ed., 2011

Utilizing hard cores of modern FPGA devices for high-performance cryptography.
J. Cryptogr. Eng., 2011

An Experimentally Verified Attack on Full Grain-128 Using Dedicated Reconfigurable Hardware.
IACR Cryptol. ePrint Arch., 2011

Full Lattice Basis Reduction on Graphics Cards.
Proceedings of the Research in Cryptology - 4th Western European Workshop, 2011

MicroECC: A Lightweight Reconfigurable Elliptic Curve Crypto-processor.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

Decrypting HDCP-protected Video Streams Using Reconfigurable Hardware.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

The future of high-speed cryptography: new computing platforms and new ciphers.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

Generic Side-Channel Countermeasures for Reconfigurable Devices.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2011 - 13th International Workshop, Nara, Japan, September 28, 2011

2010
DSPs, BRAMs, and a Pinch of Logic: Extended Recipes for AES on FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2010

Kryptografie auf programmierbarer Hardware.
Datenschutz und Datensicherheit, 2010

True random number generation in block memories of reconfigurable devices.
Proceedings of the International Conference on Field-Programmable Technology, 2010

High-Performance Integer Factoring with Reconfigurable Devices.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Breaking Elliptic Curve Cryptosystems Using Reconfigurable Hardware.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Modular Integer Arithmetic for Public Key Cryptography.
Proceedings of the Secure Integrated Circuits and Systems, 2010

2009
Cryptography and cryptanalysis on reconfigurable devices: security implementations for hardware and reprogrammable devices.
PhD thesis, 2009

Breaking ECC2K-130.
IACR Cryptol. ePrint Arch., 2009

The Certicom Challenges ECC2-X.
IACR Cryptol. ePrint Arch., 2009

Secure IP-Block Distribution for Hardware Devices.
Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust, 2009

Transforming write collisions in block RAMs into security applications.
Proceedings of the 2009 International Conference on Field-Programmable Technology, 2009

Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009

MicroEliece: McEliece for Embedded Devices.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2009

2008
Special-Purpose Hardware for Solving the Elliptic Curve Discrete Logarithm Problem.
ACM Trans. Reconfigurable Technol. Syst., 2008

Cryptanalysis with COPACOBANA.
IEEE Trans. Computers, 2008

Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis.
Proceedings of the FPL 2008, 2008

DSPs, BRAMs and a Pinch of Logic: New Recipes for AES on FPGAs.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008

Breaking Legacy Banking Standards with Special-Purpose Hardware.
Proceedings of the Financial Cryptography and Data Security, 12th International Conference, 2008

Exploiting the Power of GPUs for Asymmetric Cryptography.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2008

Ultra High Performance ECC over NIST Primes on Commercial FPGAs.
Proceedings of the Cryptographic Hardware and Embedded Systems, 2008

2007
Efficient Hash Collision Search Strategies on Special-Purpose Hardware.
Proceedings of the Research in Cryptology, Second Western European Workshop, 2007

Parallel Computing with Low-Cost FPGAs: A Framework for COPACOBANA.
Proceedings of the Parallel Computing: Architectures, 2007

Cryptanalytic Time-Memory Tradeoffs on COPACOBANA.
Proceedings of the 37. Jahrestagung der Gesellschaft für Informatik, 2007

Dynamic Intellectual Property Protection for Reconfigurable Devices.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

Attacking elliptic curve cryptosystems with special-purpose hardware.
Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

New Protection Mechanisms for Intellectual Property in Reconfigurable Logic.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

Establishing Chain of Trust in Reconfigurable Hardware.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

Reconfigurable trusted computing in hardware.
Proceedings of the 2nd ACM Workshop on Scalable Trusted Computing, 2007


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