Steven F. Gillig

According to our database, Steven F. Gillig authored at least 5 papers between 1999 and 2003.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2003

Correction to "A carry-free 54 b x 54 b multiplier using equivalent bit conversion algorithm".

Yun Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig

IEEE J. Solid State Circuits, 2003

Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm".

Milos D. Ercegovac, Tomás Lang, Y. Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig

IEEE J. Solid State Circuits, 2003

2001

A carry-free 54b×54b multiplier using equivalent bit conversion algorithm.

Yun Kim, Bang-Sup Song, John Grosspietsch, Steven F. Gillig

IEEE J. Solid State Circuits, 2001

2000

A 1-V 6-b 50-MSamples/s current-interpolating CMOS ADC.

Bang-Sup Song, Patrick L. Rakers, Steven F. Gillig

IEEE J. Solid State Circuits, 2000

1999

A 14-b, 100-MS/s CMOS DAC designed for spectral performance.

Alex R. Bugeja, Bang-Sup Song, Patrick L. Rakers, Steven F. Gillig

IEEE J. Solid State Circuits, 1999