Y. Kim
This page is a disambiguation page, it actually contains mutiple papers from persons of the same or a similar name.
Bibliography
2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2022
Comprehensive Feasibility Study of Single FIN Transistors for Scaling Both Switching Energy and Device Footprint.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the IEEE International Memory Workshop, 2022
2020
4.1 A 39GHz-Band CMOS 16-Channel Phased-Array Transceiver IC with a Companion Dual-Stream IF Transceiver IC for 5G NR Base-Station Applications.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
A general algorithm for non-parametric maximum likelihood estimator of stochastically ordered survival functions from case 2 interval-censored data.
Commun. Stat. Simul. Comput., 2019
2017
The use of the SACADA taxonomy to analyze simulation records: Insights and suggestions.
Reliab. Eng. Syst. Saf., 2017
2015
A 2.2 GS/s 188mW spectrometer processor in 65nm CMOS for supporting low-power THz planetary instruments.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Proceedings of the Sixth International Conference on Ubiquitous and Future Networks, 2014
2013
Robot-aided motion planning for knee joint rehabilitation with two robot-manipulators.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013
2012
Proceedings of the 2012 International Conference on Frontiers in Handwriting Recognition, 2012
2011
Proceedings of the 33rd Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2011
2010
Adaptive Parallel Computation for Blind Source Separation with Systolic Architecture.
Intell. Inf. Manag., 2010
2009
Cost of ownership model for spare engines purchase for the Korean navy acquisition program.
J. Oper. Res. Soc., 2009
2007
A Systolic Architecture and Implementation of Feedback Network for Blind Source Separation.
J. VLSI Signal Process., 2007
Technology scoring model considering rejected applicants and effect of reject inference.
J. Oper. Res. Soc., 2007
2005
Degradation of high-K LA<sub>2</sub>O<sub>3</sub> gate dielectrics using progressive electrical stress.
Microelectron. Reliab., 2005
2004
IEEE Trans. Image Process., 2004
2003
Comments on "A carry-free 54 b×54 b multiplier using equivalent bit conversion algorithm".
IEEE J. Solid State Circuits, 2003
1997
Constrained Topological Maps for Regression and Classification.
Proceedings of the Progress in Connectionist-Based Information Systems: Proceedings of the 1997 International Conference on Neural Information Processing and Intelligent Information Systems, 1997
Transaction Optimization Techniques.
Proceedings of the Advanced Transaction Models and Architectures, 1997
1995
Evaluation of the Medical Diagnostic Imaging Support system based on 2 years of clinical experience.
J. Digit. Imaging, 1995
1992
Hardware and software requirements for a picture archiving and communication system's diagnostic workstations.
J. Digit. Imaging, 1992
1988
Appl. Artif. Intell., 1988
1986