Subash Shankar

According to our database1, Subash Shankar
  • authored at least 18 papers between 1988 and 2016.
  • has a "Dijkstra number"2 of four.

Timeline

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Article 
PhD thesis 
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Links

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Bibliography

2016
A Tool Integrating Model Checking into a C Verification Toolset.
Proceedings of the Model Checking Software - 23rd International Symposium, 2016

2012
Undesirable Aspect Interactions: A Prevention Policy for Three Aspect Fault Types.
Proceedings of the Sixth International Conference on Software Security and Reliability, 2012

2011
Undesirable Aspect Interactions: A Prevention Policy.
Proceedings of the 5th IEEE International Symposium on Theoretical Aspects of Software Engineering, 2011

A Categorical Modeling Approach of Aspect-Oriented Systems.
Proceedings of the 5th IEEE International Symposium on Theoretical Aspects of Software Engineering, 2011

2009
A Two Stage Approach for Contiguous Sequential Pattern Mining.
Proceedings of the IEEE International Conference on Information Reuse and Integration, 2009

2008
Rule-Based Approaches for Equivalence Checking of SpecC Programs.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

2006
Equivalence checking: a rule-based approach.
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

2005
Reasoning about real-time statecharts in the presence of semantic variations.
Proceedings of the 20th IEEE/ACM International Conference on Automated Software Engineering (ASE 2005), 2005

2003
Formal Semantics of UML with Real-Time Constructs.
Proceedings of the «UML» 2003, 2003

Automating Object-Oriented Software Refactoring.
Proceedings of the International Conference on Software Engineering Research and Practice, 2003

2002
Program slicing for VHDL.
STTT, 2002

A Semantic Framework for Formal Analysis of Concurrent Systems.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A Semantic Model of Real-Time UML.
Proceedings of the Formal Methods and Software Engineering, 2002

1999
Program Slicing of Hardware Description Languages.
Proceedings of the Correct Hardware Design and Verification Methods, 1999

1998
Model Checking VHDL with CV.
Proceedings of the Formal Methods in Computer-Aided Design, 1998

1997
A polymodal semantics for VHDL.
Proceedings of the Advances in Hardware Design and Verification, 1997

Connection Based Strategies for Deciding Propositional Temporal Logic.
Proceedings of the Fourteenth National Conference on Artificial Intelligence and Ninth Innovative Applications of Artificial Intelligence Conference, 1997

1988
A Hierarchical Associative Memory Architecture for Logic Programming Unification.
Proceedings of the Logic Programming, 1988


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