Sudheer Vishwakarma
Orcid: 0009-0007-2759-0820
According to our database1,
Sudheer Vishwakarma authored at least 5 papers
between 2022 and 2026.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2026
Computation and Complexity-Aware DNN Accelerators: Architectures, Dataflows, and Design Trade-Offs.
IEEE Access, 2026
Impact of MAC Unit Design Architectures and Their Applications in Modern Computing: An In-Depth Review.
IEEE Access, 2026
2024
2023
A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators.
Proceedings of the Internet of Things. Advances in Information and Communication Technology, 2023
2022
BitMAC: Bit-Serial Computation-Based Efficient Multiply-Accumulate Unit for DNN Accelerator.
Circuits Syst. Signal Process., 2022